[Hexagon] Reorganize and update instruction patterns

llvm-svn: 316228
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-loop1.ll b/llvm/test/CodeGen/Hexagon/hwloop-loop1.ll
index 427efdc..af908b6 100644
--- a/llvm/test/CodeGen/Hexagon/hwloop-loop1.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-loop1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner=0 < %s | FileCheck %s
 ;
 ; Generate loop1 instruction for double loop sequence.