AArch64: Do not test for CPUs, use SubtargetFeatures
Testing for specific CPUs has a number of problems, better use subtarget
features:
- When some tweak is added for a specific CPU it is often desirable for
the next version of that CPU as well, yet we often forget to add it.
- It is hard to keep track of checks scattered around the target code;
Declaring all target specifics together with the CPU in the tablegen
file is a clear representation.
- Subtarget features can be tweaked from the command line.
To discourage people from using CPU checks in the future I removed the
isCortexXX(), isCyclone(), ... functions. I added an getProcFamily()
function for exceptional circumstances but made it clear in the comment
that usage is discouraged.
Reformat feature list in AArch64.td to have 1 feature per line in
alphabetical order to simplify merging and sorting for out of tree
tweaks.
No functional change intended.
Differential Revision: http://reviews.llvm.org/D20762
llvm-svn: 271555
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 1684d2f..ecf4d93 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -368,9 +368,7 @@
}
// All other insert/extracts cost this much.
- if (ST->isKryo())
- return 2;
- return 3;
+ return ST->getVectorInsertExtractBaseCost();
}
int AArch64TTIImpl::getArithmeticInstrCost(
@@ -529,9 +527,7 @@
}
unsigned AArch64TTIImpl::getMaxInterleaveFactor(unsigned VF) {
- if (ST->isCortexA57() || ST->isKryo())
- return 4;
- return 2;
+ return ST->getMaxInterleaveFactor();
}
void AArch64TTIImpl::getUnrollingPreferences(Loop *L,
@@ -630,28 +626,17 @@
}
unsigned AArch64TTIImpl::getCacheLineSize() {
- if (ST->isCyclone())
- return 64;
- return BaseT::getCacheLineSize();
+ return ST->getCacheLineSize();
}
unsigned AArch64TTIImpl::getPrefetchDistance() {
- if (ST->isCyclone())
- return 280;
- return BaseT::getPrefetchDistance();
+ return ST->getPrefetchDistance();
}
unsigned AArch64TTIImpl::getMinPrefetchStride() {
- if (ST->isCyclone())
- // The HW prefetcher handles accesses with strides up to 2KB.
- return 2048;
- return BaseT::getMinPrefetchStride();
+ return ST->getMinPrefetchStride();
}
unsigned AArch64TTIImpl::getMaxPrefetchIterationsAhead() {
- if (ST->isCyclone())
- // Be conservative for now and don't prefetch ahead too much since the loop
- // may terminate early.
- return 3;
- return BaseT::getMaxPrefetchIterationsAhead();
+ return ST->getMaxPrefetchIterationsAhead();
}