This patch adds support for the vector quadword add/sub instructions introduced
in POWER8:
vadduqm
vaddeuqm
vaddcuq
vaddecuq
vsubuqm
vsubeuqm
vsubcuq
vsubecuq
In addition to adding the instructions themselves, it also adds support for the
v1i128 type for intrinsics (Intrinsics.td, Function.cpp, and
IntrinsicEmitter.cpp).
http://reviews.llvm.org/D9081
llvm-svn: 238144
diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp
index c579b6b..cf8e3ed 100644
--- a/llvm/lib/IR/Function.cpp
+++ b/llvm/lib/IR/Function.cpp
@@ -548,7 +548,8 @@
IIT_HALF_VEC_ARG = 29,
IIT_SAME_VEC_WIDTH_ARG = 30,
IIT_PTR_TO_ARG = 31,
- IIT_VEC_OF_PTRS_TO_ELT = 32
+ IIT_VEC_OF_PTRS_TO_ELT = 32,
+ IIT_I128 = 33
};
@@ -595,6 +596,9 @@
case IIT_I64:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 64));
return;
+ case IIT_I128:
+ OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 128));
+ return;
case IIT_V1:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Vector, 1));
DecodeIITType(NextElt, Infos, OutputTable);