commit 6689abe632024f29d4c9d3c31fe0a740942a6e49
author Matt Arsenault <Matthew.Arsenault@amd.com> Thu May 05 20:07:37 2016 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Thu May 05 20:07:37 2016 +0000
tree 31a382dcf555dc182ac44dbafb04b5e35683204e
parent 8eb3397a73d1968beec5bd984966de49ae94cdaf

AMDGPU: Run r600 tests last

llvm-svn: 268672

llvm/test/CodeGen/AMDGPU/and.ll

diff --git a/llvm/test/CodeGen/AMDGPU/and.ll b/llvm/test/CodeGen/AMDGPU/and.ll
index 362aba5..c6d5bf1 100644
--- a/llvm/test/CodeGen/AMDGPU/and.ll
+++ b/llvm/test/CodeGen/AMDGPU/and.ll
@@ -1,6 +1,6 @@
-; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
 
 declare i32 @llvm.r600.read.tidig.x() #0