commit 67431d79434516483c852b70bfb87432f5db00b1
author Cameron Zwarich <zwarich@apple.com> Mon Jan 17 07:26:51 2011 +0000
committer Cameron Zwarich <zwarich@apple.com> Mon Jan 17 07:26:51 2011 +0000
tree 0e38e8d72a2d797977640b2f1762a342a15f0c33
parent 388b33b5cd5000ce32ab70f4d56028cbf705326a

Roll out r123609 due to failures on the llvm-x86_64-linux-checks bot.

llvm-svn: 123618

llvm/lib/Transforms/Utils/Mem2Reg.cpp

diff --git a/llvm/lib/Transforms/Utils/Mem2Reg.cpp b/llvm/lib/Transforms/Utils/Mem2Reg.cpp
index ea2f8fc..2b1364c 100644
--- a/llvm/lib/Transforms/Utils/Mem2Reg.cpp
+++ b/llvm/lib/Transforms/Utils/Mem2Reg.cpp
@@ -40,6 +40,7 @@
     //
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<DominatorTree>();
+      AU.addRequired<DominanceFrontier>();
       AU.setPreservesCFG();
       // This is a cluster of orthogonal Transforms
       AU.addPreserved<UnifyFunctionExitNodes>();
@@ -53,6 +54,7 @@
 INITIALIZE_PASS_BEGIN(PromotePass, "mem2reg", "Promote Memory to Register",
                 false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
+INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
 INITIALIZE_PASS_END(PromotePass, "mem2reg", "Promote Memory to Register",
                 false, false)
 
@@ -64,6 +66,7 @@
   bool Changed  = false;
 
   DominatorTree &DT = getAnalysis<DominatorTree>();
+  DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
 
   while (1) {
     Allocas.clear();
@@ -77,7 +80,7 @@
 
     if (Allocas.empty()) break;
 
-    PromoteMemToReg(Allocas, DT);
+    PromoteMemToReg(Allocas, DT, DF);
     NumPromoted += Allocas.size();
     Changed = true;
   }