commit 6756a2c95335fba8bece4402e62f5057a20f3b4c
author Ahmed Bougacha <ahmed.bougacha@gmail.com> Wed Jul 27 14:31:55 2016 +0000
committer Ahmed Bougacha <ahmed.bougacha@gmail.com> Wed Jul 27 14:31:55 2016 +0000
tree 709ff96a5dff1a43cd8648f7001709782eb47020
parent 5e402eec7bc306343cfba703fd4d4acc981b4ead

[GlobalISel] Introduce an instruction selector.

And implement it for AArch64, supporting x/w ADD/OR.

Differential Revision: https://reviews.llvm.org/D22373

llvm-svn: 276875

llvm/lib/CodeGen/LLVMTargetMachine.cpp

diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 121e037..9ed61c6 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -177,6 +177,11 @@
     if (PassConfig->addRegBankSelect())
       return nullptr;
 
+    PassConfig->addPreGlobalInstructionSelect();
+
+    if (PassConfig->addGlobalInstructionSelect())
+      return nullptr;
+
   } else if (PassConfig->addInstSelector())
     return nullptr;