| commit | 676c16d08856c10e366aa67c56c1c92be737f25a | [log] [tgz] |
|---|---|---|
| author | Tom Stellard <thomas.stellard@amd.com> | Fri Aug 16 01:11:51 2013 +0000 |
| committer | Tom Stellard <thomas.stellard@amd.com> | Fri Aug 16 01:11:51 2013 +0000 |
| tree | d3a98cff8dc24c4af038a0cb7e755242945cb86b | |
| parent | ac00f9df7933d244ab4f1078f6c4601dea6bca70 [diff] [blame] |
R600: Add IsExport bit to TableGen instruction definitions Tested-by: Aaron Watry <awatry@gmail.com> llvm-svn: 188516
diff --git a/llvm/lib/Target/R600/R600Defines.h b/llvm/lib/Target/R600/R600Defines.h index 90fc29c..8dc9ebb 100644 --- a/llvm/lib/Target/R600/R600Defines.h +++ b/llvm/lib/Target/R600/R600Defines.h
@@ -44,7 +44,8 @@ TEX_INST = (1 << 13), ALU_INST = (1 << 14), LDS_1A = (1 << 15), - LDS_1A1D = (1 << 16) + LDS_1A1D = (1 << 16), + IS_EXPORT = (1 << 17) }; }