[ARM] Fold select_cc(vecreduce_[u|s][min|max], x) into VMINV or VMAXV
This folds a select_cc or select(set_cc) of a max or min vector reduction with a scalar value into a VMAXV or VMINV.
Differential Revision: https://reviews.llvm.org/D87836
diff --git a/llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll b/llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll
index 382c32d..2862779 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll
@@ -790,16 +790,16 @@
define i32 @smin_i32_inloop(i32* nocapture readonly %x, i32 %n) {
; CHECK-LABEL: smin_i32_inloop:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .save {r4, lr}
-; CHECK-NEXT: push {r4, lr}
+; CHECK-NEXT: .save {r7, lr}
+; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r1, #1
; CHECK-NEXT: blt .LBB8_3
; CHECK-NEXT: @ %bb.1: @ %for.body.preheader
; CHECK-NEXT: mov r12, r0
-; CHECK-NEXT: mvn r0, #-2147483648
; CHECK-NEXT: cmp r1, #4
; CHECK-NEXT: bhs .LBB8_4
; CHECK-NEXT: @ %bb.2:
+; CHECK-NEXT: mvn r0, #-2147483648
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: b .LBB8_7
; CHECK-NEXT: .LBB8_3:
@@ -808,22 +808,20 @@
; CHECK-NEXT: .LBB8_4: @ %vector.ph
; CHECK-NEXT: bic r3, r1, #3
; CHECK-NEXT: movs r2, #1
-; CHECK-NEXT: sub.w lr, r3, #4
-; CHECK-NEXT: add.w lr, r2, lr, lsr #2
+; CHECK-NEXT: subs r0, r3, #4
+; CHECK-NEXT: add.w lr, r2, r0, lsr #2
+; CHECK-NEXT: mvn r0, #-2147483648
; CHECK-NEXT: mov r2, r12
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB8_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q0, [r2], #16
-; CHECK-NEXT: mvn r4, #-2147483648
-; CHECK-NEXT: vminv.s32 r4, q0
-; CHECK-NEXT: cmp r0, r4
-; CHECK-NEXT: csel r0, r0, r4, lt
+; CHECK-NEXT: vminv.s32 r0, q0
; CHECK-NEXT: le lr, .LBB8_5
; CHECK-NEXT: @ %bb.6: @ %middle.block
; CHECK-NEXT: cmp r3, r1
; CHECK-NEXT: it eq
-; CHECK-NEXT: popeq {r4, pc}
+; CHECK-NEXT: popeq {r7, pc}
; CHECK-NEXT: .LBB8_7: @ %for.body.preheader1
; CHECK-NEXT: sub.w lr, r1, r3
; CHECK-NEXT: add.w r1, r12, r3, lsl #2
@@ -835,7 +833,7 @@
; CHECK-NEXT: csel r0, r0, r2, lt
; CHECK-NEXT: le lr, .LBB8_8
; CHECK-NEXT: .LBB8_9: @ %for.cond.cleanup
-; CHECK-NEXT: pop {r4, pc}
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
@@ -988,16 +986,16 @@
define i32 @smax_i32_inloop(i32* nocapture readonly %x, i32 %n) {
; CHECK-LABEL: smax_i32_inloop:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .save {r4, lr}
-; CHECK-NEXT: push {r4, lr}
+; CHECK-NEXT: .save {r7, lr}
+; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r1, #1
; CHECK-NEXT: blt .LBB10_3
; CHECK-NEXT: @ %bb.1: @ %for.body.preheader
; CHECK-NEXT: mov r12, r0
-; CHECK-NEXT: mov.w r0, #-2147483648
; CHECK-NEXT: cmp r1, #4
; CHECK-NEXT: bhs .LBB10_4
; CHECK-NEXT: @ %bb.2:
+; CHECK-NEXT: mov.w r0, #-2147483648
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: b .LBB10_7
; CHECK-NEXT: .LBB10_3:
@@ -1006,22 +1004,20 @@
; CHECK-NEXT: .LBB10_4: @ %vector.ph
; CHECK-NEXT: bic r3, r1, #3
; CHECK-NEXT: movs r2, #1
-; CHECK-NEXT: sub.w lr, r3, #4
-; CHECK-NEXT: add.w lr, r2, lr, lsr #2
+; CHECK-NEXT: subs r0, r3, #4
+; CHECK-NEXT: add.w lr, r2, r0, lsr #2
+; CHECK-NEXT: mov.w r0, #-2147483648
; CHECK-NEXT: mov r2, r12
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB10_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q0, [r2], #16
-; CHECK-NEXT: mov.w r4, #-2147483648
-; CHECK-NEXT: vmaxv.s32 r4, q0
-; CHECK-NEXT: cmp r0, r4
-; CHECK-NEXT: csel r0, r0, r4, gt
+; CHECK-NEXT: vmaxv.s32 r0, q0
; CHECK-NEXT: le lr, .LBB10_5
; CHECK-NEXT: @ %bb.6: @ %middle.block
; CHECK-NEXT: cmp r3, r1
; CHECK-NEXT: it eq
-; CHECK-NEXT: popeq {r4, pc}
+; CHECK-NEXT: popeq {r7, pc}
; CHECK-NEXT: .LBB10_7: @ %for.body.preheader1
; CHECK-NEXT: sub.w lr, r1, r3
; CHECK-NEXT: add.w r1, r12, r3, lsl #2
@@ -1033,7 +1029,7 @@
; CHECK-NEXT: csel r0, r0, r2, gt
; CHECK-NEXT: le lr, .LBB10_8
; CHECK-NEXT: .LBB10_9: @ %for.cond.cleanup
-; CHECK-NEXT: pop {r4, pc}
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
@@ -1186,16 +1182,16 @@
define i32 @umin_i32_inloop(i32* nocapture readonly %x, i32 %n) {
; CHECK-LABEL: umin_i32_inloop:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .save {r4, lr}
-; CHECK-NEXT: push {r4, lr}
+; CHECK-NEXT: .save {r7, lr}
+; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r1, #1
; CHECK-NEXT: blt .LBB12_3
; CHECK-NEXT: @ %bb.1: @ %for.body.preheader
; CHECK-NEXT: mov r12, r0
-; CHECK-NEXT: mov.w r0, #-1
; CHECK-NEXT: cmp r1, #4
; CHECK-NEXT: bhs .LBB12_4
; CHECK-NEXT: @ %bb.2:
+; CHECK-NEXT: mov.w r0, #-1
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: b .LBB12_7
; CHECK-NEXT: .LBB12_3:
@@ -1204,22 +1200,20 @@
; CHECK-NEXT: .LBB12_4: @ %vector.ph
; CHECK-NEXT: bic r3, r1, #3
; CHECK-NEXT: movs r2, #1
-; CHECK-NEXT: sub.w lr, r3, #4
-; CHECK-NEXT: add.w lr, r2, lr, lsr #2
+; CHECK-NEXT: subs r0, r3, #4
+; CHECK-NEXT: add.w lr, r2, r0, lsr #2
+; CHECK-NEXT: mov.w r0, #-1
; CHECK-NEXT: mov r2, r12
; CHECK-NEXT: dls lr, lr
; CHECK-NEXT: .LBB12_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q0, [r2], #16
-; CHECK-NEXT: mov.w r4, #-1
-; CHECK-NEXT: vminv.u32 r4, q0
-; CHECK-NEXT: cmp r0, r4
-; CHECK-NEXT: csel r0, r0, r4, lo
+; CHECK-NEXT: vminv.u32 r0, q0
; CHECK-NEXT: le lr, .LBB12_5
; CHECK-NEXT: @ %bb.6: @ %middle.block
; CHECK-NEXT: cmp r3, r1
; CHECK-NEXT: it eq
-; CHECK-NEXT: popeq {r4, pc}
+; CHECK-NEXT: popeq {r7, pc}
; CHECK-NEXT: .LBB12_7: @ %for.body.preheader1
; CHECK-NEXT: sub.w lr, r1, r3
; CHECK-NEXT: add.w r1, r12, r3, lsl #2
@@ -1231,7 +1225,7 @@
; CHECK-NEXT: csel r0, r0, r2, hi
; CHECK-NEXT: le lr, .LBB12_8
; CHECK-NEXT: .LBB12_9: @ %for.cond.cleanup
-; CHECK-NEXT: pop {r4, pc}
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
@@ -1384,17 +1378,22 @@
define i32 @umax_i32_inloop(i32* nocapture readonly %x, i32 %n) {
; CHECK-LABEL: umax_i32_inloop:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .save {r4, lr}
-; CHECK-NEXT: push {r4, lr}
+; CHECK-NEXT: .save {r7, lr}
+; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r1, #1
-; CHECK-NEXT: blt .LBB14_8
+; CHECK-NEXT: blt .LBB14_3
; CHECK-NEXT: @ %bb.1: @ %for.body.preheader
; CHECK-NEXT: mov r12, r0
-; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: cmp r1, #4
-; CHECK-NEXT: mov.w r0, #0
-; CHECK-NEXT: blo .LBB14_5
-; CHECK-NEXT: @ %bb.2: @ %vector.ph
+; CHECK-NEXT: bhs .LBB14_4
+; CHECK-NEXT: @ %bb.2:
+; CHECK-NEXT: movs r3, #0
+; CHECK-NEXT: movs r0, #0
+; CHECK-NEXT: b .LBB14_7
+; CHECK-NEXT: .LBB14_3:
+; CHECK-NEXT: movs r0, #0
+; CHECK-NEXT: b .LBB14_9
+; CHECK-NEXT: .LBB14_4: @ %vector.ph
; CHECK-NEXT: bic r3, r1, #3
; CHECK-NEXT: movs r2, #1
; CHECK-NEXT: subs r0, r3, #4
@@ -1402,33 +1401,27 @@
; CHECK-NEXT: movs r0, #0
; CHECK-NEXT: mov r2, r12
; CHECK-NEXT: dls lr, lr
-; CHECK-NEXT: .LBB14_3: @ %vector.body
+; CHECK-NEXT: .LBB14_5: @ %vector.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q0, [r2], #16
-; CHECK-NEXT: movs r4, #0
-; CHECK-NEXT: vmaxv.u32 r4, q0
-; CHECK-NEXT: cmp r0, r4
-; CHECK-NEXT: csel r0, r0, r4, hi
-; CHECK-NEXT: le lr, .LBB14_3
-; CHECK-NEXT: @ %bb.4: @ %middle.block
+; CHECK-NEXT: vmaxv.u32 r0, q0
+; CHECK-NEXT: le lr, .LBB14_5
+; CHECK-NEXT: @ %bb.6: @ %middle.block
; CHECK-NEXT: cmp r3, r1
; CHECK-NEXT: it eq
-; CHECK-NEXT: popeq {r4, pc}
-; CHECK-NEXT: .LBB14_5: @ %for.body.preheader1
+; CHECK-NEXT: popeq {r7, pc}
+; CHECK-NEXT: .LBB14_7: @ %for.body.preheader1
; CHECK-NEXT: sub.w lr, r1, r3
; CHECK-NEXT: add.w r1, r12, r3, lsl #2
; CHECK-NEXT: dls lr, lr
-; CHECK-NEXT: .LBB14_6: @ %for.body
+; CHECK-NEXT: .LBB14_8: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ldr r2, [r1], #4
; CHECK-NEXT: cmp r0, r2
; CHECK-NEXT: csel r0, r0, r2, hi
-; CHECK-NEXT: le lr, .LBB14_6
-; CHECK-NEXT: @ %bb.7: @ %for.cond.cleanup
-; CHECK-NEXT: pop {r4, pc}
-; CHECK-NEXT: .LBB14_8:
-; CHECK-NEXT: movs r0, #0
-; CHECK-NEXT: pop {r4, pc}
+; CHECK-NEXT: le lr, .LBB14_8
+; CHECK-NEXT: .LBB14_9: @ %for.cond.cleanup
+; CHECK-NEXT: pop {r7, pc}
entry:
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup