[Hexagon] Move pre-RA DAG mutations to scheduler constructor
llvm-svn: 311894
diff --git a/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp b/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
index 1a26805..375a64de 100644
--- a/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
@@ -12,6 +12,7 @@
//
//===----------------------------------------------------------------------===//
+#include "HexagonInstrInfo.h"
#include "HexagonMachineScheduler.h"
#include "HexagonSubtarget.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
@@ -51,16 +52,6 @@
#define DEBUG_TYPE "machine-scheduler"
-namespace {
-class HexagonCallMutation : public ScheduleDAGMutation {
-public:
- void apply(ScheduleDAGInstrs *DAG) override;
-private:
- bool shouldTFRICallBind(const HexagonInstrInfo &HII,
- const SUnit &Inst1, const SUnit &Inst2) const;
-};
-} // end anonymous namespace
-
// Check if a call and subsequent A2_tfrpi instructions should maintain
// scheduling affinity. We are looking for the TFRI to be consumed in
// the next instruction. This should help reduce the instances of
@@ -336,9 +327,6 @@
assert((!llvm::ForceTopDown || !llvm::ForceBottomUp) &&
"-misched-topdown incompatible with -misched-bottomup");
-
- DAG->addMutation(make_unique<HexagonSubtarget::HexagonDAGMutation>());
- DAG->addMutation(make_unique<HexagonCallMutation>());
}
void ConvergingVLIWScheduler::releaseTopNode(SUnit *SU) {
diff --git a/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h b/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h
index 810abf3..0af29c2 100644
--- a/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h
+++ b/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h
@@ -249,7 +249,14 @@
#endif
};
-} // namespace
+class HexagonCallMutation : public ScheduleDAGMutation {
+public:
+ void apply(ScheduleDAGInstrs *DAG) override;
+private:
+ bool shouldTFRICallBind(const HexagonInstrInfo &HII,
+ const SUnit &Inst1, const SUnit &Inst2) const;
+};
+} // namespace
#endif
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 0163475..405f441 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -100,7 +100,12 @@
int HexagonTargetMachineModule = 0;
static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) {
- return new VLIWMachineScheduler(C, make_unique<ConvergingVLIWScheduler>());
+ ScheduleDAGMILive *DAG =
+ new VLIWMachineScheduler(C, make_unique<ConvergingVLIWScheduler>());
+ DAG->addMutation(make_unique<HexagonSubtarget::HexagonDAGMutation>());
+ DAG->addMutation(make_unique<HexagonCallMutation>());
+ DAG->addMutation(createCopyConstrainDAGMutation(DAG->TII, DAG->TRI));
+ return DAG;
}
static MachineSchedRegistry