Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
llvm-svn: 145171
diff --git a/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll b/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
index f339373..4c7d2d0 100644
--- a/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
+++ b/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
@@ -7,9 +7,9 @@
define void @uip_arp_arpin() nounwind {
entry:
- %tmp = volatile load i16* @uip_len ; <i16> [#uses=1]
+ %tmp = load volatile i16* @uip_len ; <i16> [#uses=1]
%cmp = icmp ult i16 %tmp, 42 ; <i1> [#uses=1]
- volatile store i16 0, i16* @uip_len
+ store volatile i16 0, i16* @uip_len
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
diff --git a/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll b/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
index 088d3e1..e8c0d14 100644
--- a/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
+++ b/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
@@ -6,8 +6,8 @@
define i16 @foo() nounwind readnone {
entry:
%result = alloca i16, align 1 ; <i16*> [#uses=2]
- volatile store i16 0, i16* %result
- %tmp = volatile load i16* %result ; <i16> [#uses=1]
+ store volatile i16 0, i16* %result
+ %tmp = load volatile i16* %result ; <i16> [#uses=1]
ret i16 %tmp
}
@@ -22,8 +22,8 @@
while.end: ; preds = %while.cond
%result.i = alloca i16, align 1 ; <i16*> [#uses=2]
- volatile store i16 0, i16* %result.i
- %tmp.i = volatile load i16* %result.i ; <i16> [#uses=0]
+ store volatile i16 0, i16* %result.i
+ %tmp.i = load volatile i16* %result.i ; <i16> [#uses=0]
ret i16 0
}
diff --git a/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll b/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
index 4d7d9b9..9fab482 100644
--- a/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
+++ b/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
@@ -11,10 +11,10 @@
%x.addr = alloca i8 ; <i8*> [#uses=2]
%tmp = alloca i8, align 1 ; <i8*> [#uses=2]
store i8 %x, i8* %x.addr
- %tmp1 = volatile load i8* @"\010x0021" ; <i8> [#uses=1]
+ %tmp1 = load volatile i8* @"\010x0021" ; <i8> [#uses=1]
store i8 %tmp1, i8* %tmp
%tmp2 = load i8* %x.addr ; <i8> [#uses=1]
- volatile store i8 %tmp2, i8* @"\010x0021"
+ store volatile i8 %tmp2, i8* @"\010x0021"
%tmp3 = load i8* %tmp ; <i8> [#uses=1]
store i8 %tmp3, i8* %retval
%0 = load i8* %retval ; <i8> [#uses=1]
diff --git a/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll b/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
index 856eb9d..c1a186a 100644
--- a/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
+++ b/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
@@ -4,9 +4,9 @@
entry:
%r = alloca i8 ; <i8*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- volatile load i8* %r, align 1 ; <i8>:0 [#uses=1]
+ load volatile i8* %r, align 1 ; <i8>:0 [#uses=1]
or i8 %0, 1 ; <i8>:1 [#uses=1]
- volatile store i8 %1, i8* %r, align 1
+ store volatile i8 %1, i8* %r, align 1
br label %return
return: ; preds = %entry
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
index 4f9a724..c7ecb5a 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
@@ -32,7 +32,7 @@
; CHECK: bis.b bar(r14), r15
define i16 @am4(i16 %x) nounwind {
- %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %1 = load volatile i16* inttoptr(i16 32 to i16*)
%2 = or i16 %1,%x
ret i16 %2
}
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
index 17ebd87..727c29f 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
@@ -35,9 +35,9 @@
; CHECK: bis.b r14, bar(r15)
define void @am4(i16 %x) nounwind {
- %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %1 = load volatile i16* inttoptr(i16 32 to i16*)
%2 = or i16 %x, %1
- volatile store i16 %2, i16* inttoptr(i16 32 to i16*)
+ store volatile i16 %2, i16* inttoptr(i16 32 to i16*)
ret void
}
; CHECK: am4:
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
index 6676b88..7cd345b 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
@@ -29,7 +29,7 @@
; CHECK: mov.b bar(r15), r15
define i16 @am4() nounwind {
- %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %1 = load volatile i16* inttoptr(i16 32 to i16*)
ret i16 %1
}
; CHECK: am4:
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll
index 4b327b0..5eeb02f 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll
@@ -29,7 +29,7 @@
; CHECK: mov.b r14, bar(r15)
define void @am4(i16 %a) nounwind {
- volatile store i16 %a, i16* inttoptr(i16 32 to i16*)
+ store volatile i16 %a, i16* inttoptr(i16 32 to i16*)
ret void
}
; CHECK: am4: