Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
llvm-svn: 52706
diff --git a/llvm/test/CodeGen/PowerPC/atomic-1.ll b/llvm/test/CodeGen/PowerPC/atomic-1.ll
index 74b9c6a..e588b2f 100644
--- a/llvm/test/CodeGen/PowerPC/atomic-1.ll
+++ b/llvm/test/CodeGen/PowerPC/atomic-1.ll
@@ -2,17 +2,17 @@
; RUN: llvm-as < %s | llc -march=ppc32 | grep stwcx. | count 4
define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
- %tmp = call i32 @llvm.atomic.las.i32( i32* %mem, i32 %val )
+ %tmp = call i32 @llvm.atomic.load.add.i32( i32* %mem, i32 %val )
ret i32 %tmp
}
define i32 @exchange_and_cmp(i32* %mem) nounwind {
- %tmp = call i32 @llvm.atomic.lcs.i32( i32* %mem, i32 0, i32 1 )
+ %tmp = call i32 @llvm.atomic.cmp.swap.i32( i32* %mem, i32 0, i32 1 )
ret i32 %tmp
}
define i16 @exchange_and_cmp16(i16* %mem) nounwind {
- %tmp = call i16 @llvm.atomic.lcs.i16( i16* %mem, i16 0, i16 1 )
+ %tmp = call i16 @llvm.atomic.cmp.swap.i16( i16* %mem, i16 0, i16 1 )
ret i16 %tmp
}
@@ -21,7 +21,7 @@
ret i32 %tmp
}
-declare i32 @llvm.atomic.las.i32(i32*, i32) nounwind
-declare i32 @llvm.atomic.lcs.i32(i32*, i32, i32) nounwind
-declare i16 @llvm.atomic.lcs.i16(i16*, i16, i16) nounwind
+declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind
+declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind
+declare i16 @llvm.atomic.cmp.swap.i16(i16*, i16, i16) nounwind
declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind