commit 6c71ef32bee543a91bd2825a1f7b876673dd10dd
author Akira Hatanaka <ahatanaka@mips.com> Mon Oct 03 21:24:30 2011 +0000
committer Akira Hatanaka <ahatanaka@mips.com> Mon Oct 03 21:24:30 2011 +0000
tree d72dab624d012373d000c9b409f47fe11d6ac71d
parent c3a6357ee3904bc098edef9f7c6e7b4597d36336

Move CHECK after entry label.

llvm-svn: 141030

llvm/test/CodeGen/Mips/mips64instrs.ll

diff --git a/llvm/test/CodeGen/Mips/mips64instrs.ll b/llvm/test/CodeGen/Mips/mips64instrs.ll
index 8c02a2d..c9812a2 100644
--- a/llvm/test/CodeGen/Mips/mips64instrs.ll
+++ b/llvm/test/CodeGen/Mips/mips64instrs.ll
@@ -118,16 +118,16 @@
 
 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
 
-; CHECK: dclz $2, $4
 define i64 @f18(i64 %X) nounwind readnone {
 entry:
+; CHECK: dclz $2, $4
   %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X)
   ret i64 %tmp1
 }
 
-; CHECK: dclo $2, $4
 define i64 @f19(i64 %X) nounwind readnone {
 entry:
+; CHECK: dclo $2, $4
   %neg = xor i64 %X, -1
   %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg)
   ret i64 %tmp1