Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-
effect that we get proper instruction printing using the "pop" mnemonic for it.
llvm-svn: 127502
diff --git a/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll b/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll
index d9e1a14..fee8600 100644
--- a/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll
+++ b/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll
@@ -6,7 +6,7 @@
entry:
%0 = tail call i32 @foo(i32 %a) nounwind ; <i32> [#uses=1]
%1 = add nsw i32 %0, 3 ; <i32> [#uses=1]
-; CHECK: ldmia sp!, {r11, pc}
+; CHECK: pop {r11, pc}
; V4: pop
; V4-NEXT: mov pc, lr
ret i32 %1
diff --git a/llvm/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll b/llvm/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll
index 163c9b0..32d350e9 100644
--- a/llvm/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll
+++ b/llvm/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll
@@ -4,9 +4,9 @@
; was being treated as an instruction count.
; CHECK: push
-; CHECK: ldmia
-; CHECK: ldmia
-; CHECK: ldmia
+; CHECK: pop
+; CHECK: pop
+; CHECK: pop
define i32 @test(i32 %x) {
entry:
diff --git a/llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll b/llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll
index 8d7541f..e3c18ce 100644
--- a/llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll
+++ b/llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll
@@ -10,7 +10,7 @@
; ARM: bl _foo
; ARM: bl _foo
; ARM: bl _foo
-; ARM: ldmia sp!, {r7, pc}
+; ARM: pop {r7, pc}
; THUMB2: t:
; THUMB2: push
diff --git a/llvm/test/CodeGen/ARM/bx_fold.ll b/llvm/test/CodeGen/ARM/bx_fold.ll
index 09f1aae..5533038 100644
--- a/llvm/test/CodeGen/ARM/bx_fold.ll
+++ b/llvm/test/CodeGen/ARM/bx_fold.ll
@@ -24,7 +24,7 @@
bb18: ; preds = %bb1
; CHECK-NOT: bx
-; CHECK: ldmia sp!
+; CHECK: pop
ret void
}
diff --git a/llvm/test/CodeGen/ARM/code-placement.ll b/llvm/test/CodeGen/ARM/code-placement.ll
index 036598f..91ef659 100644
--- a/llvm/test/CodeGen/ARM/code-placement.ll
+++ b/llvm/test/CodeGen/ARM/code-placement.ll
@@ -72,7 +72,7 @@
br i1 %4, label %bb1, label %bb3
; CHECK: LBB1_[[RET]]: @ %bb5
-; CHECK: ldmia sp!
+; CHECK: pop
bb5: ; preds = %bb3, %entry
%sum.1.lcssa = phi i32 [ 0, %entry ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=1]
ret i32 %sum.1.lcssa
diff --git a/llvm/test/CodeGen/ARM/ifcvt10.ll b/llvm/test/CodeGen/ARM/ifcvt10.ll
index 75428ac..18f87bf 100644
--- a/llvm/test/CodeGen/ARM/ifcvt10.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt10.ll
@@ -9,9 +9,9 @@
; CHECK: t:
; CHECK: vpop {d8}
; CHECK-NOT: vpopne
-; CHECK: ldmia sp!, {r7, pc}
+; CHECK: pop {r7, pc}
; CHECK: vpop {d8}
-; CHECK: ldmia sp!, {r7, pc}
+; CHECK: pop {r7, pc}
br i1 undef, label %if.else, label %if.then
if.then: ; preds = %entry
diff --git a/llvm/test/CodeGen/ARM/ifcvt5.ll b/llvm/test/CodeGen/ARM/ifcvt5.ll
index bca2ae34..3615055 100644
--- a/llvm/test/CodeGen/ARM/ifcvt5.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt5.ll
@@ -11,7 +11,7 @@
define i32 @t1(i32 %a, i32 %b) {
; CHECK: t1:
-; CHECK: ldmialt sp!, {r7, pc}
+; CHECK: poplt {r7, pc}
entry:
%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
diff --git a/llvm/test/CodeGen/ARM/ifcvt6.ll b/llvm/test/CodeGen/ARM/ifcvt6.ll
index 5edf32fd..2327657 100644
--- a/llvm/test/CodeGen/ARM/ifcvt6.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt6.ll
@@ -3,7 +3,7 @@
define void @foo(i32 %X, i32 %Y) {
entry:
; CHECK: cmpne
-; CHECK: ldmiahi sp!
+; CHECK: pophi
%tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
%tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
%tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/ifcvt7.ll b/llvm/test/CodeGen/ARM/ifcvt7.ll
index 62e1355..476ed4d 100644
--- a/llvm/test/CodeGen/ARM/ifcvt7.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt7.ll
@@ -6,7 +6,7 @@
define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
; CHECK: cmpeq
; CHECK: moveq
-; CHECK: ldmiaeq sp!
+; CHECK: popeq
entry:
br label %tailrecurse
diff --git a/llvm/test/CodeGen/ARM/ifcvt8.ll b/llvm/test/CodeGen/ARM/ifcvt8.ll
index 5fdfc4e..ca9a5c6 100644
--- a/llvm/test/CodeGen/ARM/ifcvt8.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt8.ll
@@ -5,7 +5,7 @@
declare void @abort()
define fastcc void @t(%struct.SString* %word, i8 signext %c) {
-; CHECK: ldmiane sp!
+; CHECK: popne
entry:
%tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1]
br i1 %tmp1, label %cond_true, label %cond_false
diff --git a/llvm/test/CodeGen/ARM/ldm.ll b/llvm/test/CodeGen/ARM/ldm.ll
index 2f1b85e..db78fd0 100644
--- a/llvm/test/CodeGen/ARM/ldm.ll
+++ b/llvm/test/CodeGen/ARM/ldm.ll
@@ -5,9 +5,9 @@
define i32 @t1() {
; CHECK: t1:
-; CHECK: ldmia
+; CHECK: pop
; V4T: t1:
-; V4T: ldmia
+; V4T: pop
%tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]
%tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
%tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
@@ -16,9 +16,9 @@
define i32 @t2() {
; CHECK: t2:
-; CHECK: ldmia
+; CHECK: pop
; V4T: t2:
-; V4T: ldmia
+; V4T: pop
%tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
%tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
%tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]
@@ -29,7 +29,7 @@
define i32 @t3() {
; CHECK: t3:
; CHECK: ldmib
-; CHECK: ldmia sp!
+; CHECK: pop
; V4T: t3:
; V4T: ldmib
; V4T: pop