Added 128-bit packed integer subtraction.
llvm-svn: 27096
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0a9f4b4..01951e6 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -294,6 +294,9 @@
setOperationAction(ISD::ADD, MVT::v8i16, Legal);
setOperationAction(ISD::ADD, MVT::v4i32, Legal);
setOperationAction(ISD::SUB, MVT::v2f64, Legal);
+ setOperationAction(ISD::SUB, MVT::v16i8, Legal);
+ setOperationAction(ISD::SUB, MVT::v8i16, Legal);
+ setOperationAction(ISD::SUB, MVT::v4i32, Legal);
setOperationAction(ISD::MUL, MVT::v2f64, Legal);
setOperationAction(ISD::LOAD, MVT::v2f64, Legal);
setOperationAction(ISD::LOAD, MVT::v16i8, Legal);
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index af158f9..fd97877 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -862,6 +862,29 @@
"paddd {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v4i32 (add VR128:$src1,
(load addr:$src2))))]>;
+
+def PSUBBrr : PDI<0xF8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "psubb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (v16i8 (sub VR128:$src1, VR128:$src2)))]>;
+def PSUBWrr : PDI<0xF9, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "psubw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (v8i16 (sub VR128:$src1, VR128:$src2)))]>;
+def PSUBDrr : PDI<0xFA, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "psubd {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (v4i32 (sub VR128:$src1, VR128:$src2)))]>;
+
+def PSUBBrm : PDI<0xF8, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
+ "psubb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (v16i8 (sub VR128:$src1,
+ (load addr:$src2))))]>;
+def PSUBWrm : PDI<0xF9, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
+ "psubw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (v8i16 (sub VR128:$src1,
+ (load addr:$src2))))]>;
+def PSUBDrm : PDI<0xFA, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
+ "psubd {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (v4i32 (sub VR128:$src1,
+ (load addr:$src2))))]>;
}
//===----------------------------------------------------------------------===//