[InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern.
In this pattern, all the "magic" bits that we'd `add` are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups
It is possible that `haveNoCommonBitsSet()` should be taught about this
pattern so that we never have an `add` variant, but the reasoning would
need to be recursive (because of that `select`), so i'm not really sure
that would be worth it just yet.
llvm-svn: 375378
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 5d306cd..77907cc 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1097,10 +1097,11 @@
return nullptr;
}
-static Instruction *
-canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(
- BinaryOperator &I, InstCombiner::BuilderTy &Builder) {
+Instruction *
+InstCombiner::canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(
+ BinaryOperator &I) {
assert((I.getOpcode() == Instruction::Add ||
+ I.getOpcode() == Instruction::Or ||
I.getOpcode() == Instruction::Sub) &&
"Expecting add/sub instruction");
@@ -1114,7 +1115,7 @@
m_Value(Select))))
return nullptr;
- // `add` is commutative; but for `sub`, "select" *must* be on RHS.
+ // `add`/`or` is commutative; but for `sub`, "select" *must* be on RHS.
if (I.getOpcode() == Instruction::Sub && I.getOperand(1) != Select)
return nullptr;
@@ -1140,13 +1141,13 @@
X->getType()->getScalarSizeInBits()))))
return nullptr;
- // Sign-extending value can be sign-extended itself if we `add` it,
- // or zero-extended if we `sub`tract it.
+ // Sign-extending value can be zero-extended if we `sub`tract it,
+ // or sign-extended otherwise.
auto SkipExtInMagic = [&I](Value *&V) {
- if (I.getOpcode() == Instruction::Add)
- match(V, m_SExtOrSelf(m_Value(V)));
- else
+ if (I.getOpcode() == Instruction::Sub)
match(V, m_ZExtOrSelf(m_Value(V)));
+ else
+ match(V, m_SExtOrSelf(m_Value(V)));
};
// Now, finally validate the sign-extending magic.
@@ -1169,7 +1170,7 @@
if (!ShouldSignext)
std::swap(SignExtendingValue, Zero);
- // If we should not perform sign-extension then we must add/subtract zero.
+ // If we should not perform sign-extension then we must add/or/subtract zero.
if (!match(Zero, m_Zero()))
return nullptr;
// Otherwise, it should be some constant, left-shifted by the same NBits we
@@ -1181,10 +1182,10 @@
m_Shl(m_Constant(SignExtendingValueBaseConstant),
m_ZExtOrSelf(m_Specific(NBits)))))
return nullptr;
- // If we `add`, then the constant should be all-ones, else it should be one.
- if (I.getOpcode() == Instruction::Add
- ? !match(SignExtendingValueBaseConstant, m_AllOnes())
- : !match(SignExtendingValueBaseConstant, m_One()))
+ // If we `sub`, then the constant should be one, else it should be all-ones.
+ if (I.getOpcode() == Instruction::Sub
+ ? !match(SignExtendingValueBaseConstant, m_One())
+ : !match(SignExtendingValueBaseConstant, m_AllOnes()))
return nullptr;
auto *NewAShr = BinaryOperator::CreateAShr(X, LowBitsToSkip,
@@ -1403,8 +1404,7 @@
return V;
if (Instruction *V =
- canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(
- I, Builder))
+ canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(I))
return V;
if (Instruction *SatAdd = foldToUnsignedSaturatedAdd(I))
@@ -2006,8 +2006,7 @@
}
if (Instruction *V =
- canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(
- I, Builder))
+ canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(I))
return V;
if (Instruction *Ext = narrowMathIfNoOverflow(I))