AMDGPU: Start adding tail call support
Handle the sibling call cases.
llvm-svn: 310753
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
index 4d87286..25139b2 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
@@ -110,6 +110,17 @@
unsigned PSInputAddr = 0;
unsigned PSInputEnable = 0;
+ /// Number of bytes of arguments this function has on the stack. If the callee
+ /// is expected to restore the argument stack this should be a multiple of 16,
+ /// all usable during a tail call.
+ ///
+ /// The alternative would forbid tail call optimisation in some cases: if we
+ /// want to transfer control from a function with 8-bytes of stack-argument
+ /// space to a function with 16-bytes then misalignment of this value would
+ /// make a stack adjustment necessary, which could not be undone by the
+ /// callee.
+ unsigned BytesInStackArgArea = 0;
+
bool ReturnsVoid = true;
// A pair of default/requested minimum/maximum flat work group sizes.
@@ -235,6 +246,14 @@
unsigned getTIDReg() const { return TIDReg; }
void setTIDReg(unsigned Reg) { TIDReg = Reg; }
+ unsigned getBytesInStackArgArea() const {
+ return BytesInStackArgArea;
+ }
+
+ void setBytesInStackArgArea(unsigned Bytes) {
+ BytesInStackArgArea = Bytes;
+ }
+
// Add user SGPRs.
unsigned addPrivateSegmentBuffer(const SIRegisterInfo &TRI);
unsigned addDispatchPtr(const SIRegisterInfo &TRI);