commit 720d8999c7f3ca9b26c83a95fb3bd8598e29c0d4
author Chris Lattner <sabre@nondot.org> Sat Jan 26 01:05:42 2008 +0000
committer Chris Lattner <sabre@nondot.org> Sat Jan 26 01:05:42 2008 +0000
tree 04a09a3017fca6656cef00f25ee7f0a0dd3e2a37
parent 2df73ea849d375e7afa74031418a2a55cae43504

don't bother making x&-1 only to simplify it in dag combine.  This commonly occurs expanding i64 ops.

llvm-svn: 46383

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index efbaa5a..ad6cd1b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1877,6 +1877,8 @@
     // worth handling here.
     if (N2C && N2C->getValue() == 0)
       return N2;
+    if (N2C && N2C->isAllOnesValue())  // X & -1 -> X
+      return N1;
     break;
   case ISD::OR:
   case ISD::XOR: