[ARM] Assembler support for the ARMv8.2a dot product instructions
Commit r310480 added the AArch64 ARMv8.2a dot product instructions;
this adds the AArch32 instructions.
Differential Revision: https://reviews.llvm.org/D36575
llvm-svn: 310701
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 3f017f1..1246cf3 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5348,7 +5348,8 @@
Mnemonic == "vcvtm" || Mnemonic == "vrinta" || Mnemonic == "vrintn" ||
Mnemonic == "vrintp" || Mnemonic == "vrintm" || Mnemonic == "hvc" ||
Mnemonic.startswith("vsel") || Mnemonic == "vins" || Mnemonic == "vmovx" ||
- Mnemonic == "bxns" || Mnemonic == "blxns")
+ Mnemonic == "bxns" || Mnemonic == "blxns" ||
+ Mnemonic == "vudot" || Mnemonic == "vsdot")
return Mnemonic;
// First, split out any predication code. Ignore mnemonics we know aren't
@@ -5454,7 +5455,8 @@
Mnemonic.startswith("aes") || Mnemonic == "hvc" || Mnemonic == "setpan" ||
Mnemonic.startswith("sha1") || Mnemonic.startswith("sha256") ||
(FullInst.startswith("vmull") && FullInst.endswith(".p64")) ||
- Mnemonic == "vmovx" || Mnemonic == "vins") {
+ Mnemonic == "vmovx" || Mnemonic == "vins" ||
+ Mnemonic == "vudot" || Mnemonic == "vsdot") {
// These mnemonics are never predicable
CanAcceptPredicationCode = false;
} else if (!isThumb()) {