AArch64: Relax assert about large shift sizes.
The reason why these large shift sizes happen is because OpaqueConstants
currently inhibit alot of DAG combining, but that has to be addressed in
another commit (like the proposal in D6946).
Differential Revision: http://reviews.llvm.org/D6940
llvm-svn: 230355
diff --git a/llvm/test/CodeGen/AArch64/large_shift.ll b/llvm/test/CodeGen/AArch64/large_shift.ll
new file mode 100644
index 0000000..f72c97d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/large_shift.ll
@@ -0,0 +1,21 @@
+; RUN: llc -march=aarch64 -o - %s
+target triple = "arm64-unknown-unknown"
+
+; Make sure we don't run into an assert in the aarch64 code selection when
+; DAGCombining fails.
+
+declare void @t()
+
+define void @foo() {
+ %c = bitcast i64 270458 to i64
+ %t0 = lshr i64 %c, 422383
+ %t1 = trunc i64 %t0 to i1
+ br i1 %t1, label %BB1, label %BB0
+
+BB0:
+ call void @t()
+ br label %BB1
+
+BB1:
+ ret void
+}