Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108
llvm-svn: 133289
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 2537fc3..e2bbcfb 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -3017,6 +3017,12 @@
(and (shl GPR:$Rm, (i32 8)), 0xFF000000)))))]>,
Requires<[IsARM, HasV6]>;
+def : ARMV6Pat<(or (or (or (and (srl GPR:$Rm, (i32 8)), 0xFF0000),
+ (and (shl GPR:$Rm, (i32 8)), 0xFF000000)),
+ (and (srl GPR:$Rm, (i32 8)), 0xFF)),
+ (and (shl GPR:$Rm, (i32 8)), 0xFF00)),
+ (REV16 GPR:$Rm)>;
+
def REVSH : AMiscA1I<0b01101111, 0b1011, (outs GPR:$Rd), (ins GPR:$Rm),
IIC_iUNAr, "revsh", "\t$Rd, $Rm",
[(set GPR:$Rd,