GlobalISel: avoid inserting redundant COPYs for bitcasts.
If the value produced by the bitcast hasn't been referenced yet, we can simply
reuse the input register avoiding an unnecessary COPY instruction.
llvm-svn: 278245
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index a5f62cf..4ea0951 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -166,8 +166,11 @@
bool IRTranslator::translateBitCast(const CastInst &CI) {
if (LLT{*CI.getDestTy()} == LLT{*CI.getSrcTy()}) {
- MIRBuilder.buildCopy(getOrCreateVReg(CI),
- getOrCreateVReg(*CI.getOperand(0)));
+ unsigned &Reg = ValToVReg[&CI];
+ if (Reg)
+ MIRBuilder.buildCopy(Reg, getOrCreateVReg(*CI.getOperand(0)));
+ else
+ Reg = getOrCreateVReg(*CI.getOperand(0));
return true;
}
return translateCast(TargetOpcode::G_BITCAST, CI);
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
index e63b851..f036d12 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -214,14 +214,33 @@
; CHECK-LABEL: name: trivial_bitcast
; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
-; CHECK: [[RES:%[0-9]+]](64) = COPY [[ARG1]]
-; CHECK: %x0 = COPY [[RES]]
+; CHECK: %x0 = COPY [[ARG1]]
; CHECK: RET_ReallyLR implicit %x0
define i64* @trivial_bitcast(i8* %a) {
%val = bitcast i8* %a to i64*
ret i64* %val
}
+; CHECK-LABEL: name: trivial_bitcast_with_copy
+; CHECK: [[A:%[0-9]+]](64) = COPY %x0
+; CHECK: G_BR unsized %[[CAST:bb\.[0-9]+]]
+
+; CHECK: [[CAST]]:
+; CHECK: {{%[0-9]+}}(64) = COPY [[A]]
+; CHECK: G_BR unsized %[[END:bb\.[0-9]+]]
+
+; CHECK: [[END]]:
+define i64* @trivial_bitcast_with_copy(i8* %a) {
+ br label %cast
+
+end:
+ ret i64* %val
+
+cast:
+ %val = bitcast i8* %a to i64*
+ br label %end
+}
+
; CHECK-LABEL: name: bitcast
; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
; CHECK: [[RES1:%[0-9]+]](64) = G_BITCAST { <2 x s32>, s64 } [[ARG1]]