commit 756d81905f61f3a86106bf7ab53a1270e654406d
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jul 01 18:47:22 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jul 01 18:47:22 2019 +0000
tree a3b4b10816b989429afc5a32c0e44a24b23b6725
parent e2c86cce3a2d1ad88c1f2b37f4b419c887a8d5b9

AMDGPU/GlobalISel: Legalize workgroup ID intrinsics

llvm-svn: 364834

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 831e933..f42e00a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -1188,6 +1188,15 @@
   case Intrinsic::amdgcn_workitem_id_z:
     return legalizePreloadedArgIntrin(MI, MRI, B,
                                       AMDGPUFunctionArgInfo::WORKITEM_ID_Z);
+  case Intrinsic::amdgcn_workgroup_id_x:
+    return legalizePreloadedArgIntrin(MI, MRI, B,
+                                      AMDGPUFunctionArgInfo::WORKGROUP_ID_X);
+  case Intrinsic::amdgcn_workgroup_id_y:
+    return legalizePreloadedArgIntrin(MI, MRI, B,
+                                      AMDGPUFunctionArgInfo::WORKGROUP_ID_Y);
+  case Intrinsic::amdgcn_workgroup_id_z:
+    return legalizePreloadedArgIntrin(MI, MRI, B,
+                                      AMDGPUFunctionArgInfo::WORKGROUP_ID_Z);
   default:
     return true;
   }