| commit | 75f0968b3965806cdbad375d17723c29a752fb2d | [log] [tgz] |
|---|---|---|
| author | Changpeng Fang <changpeng.fang@gmail.com> | Wed Aug 24 20:35:23 2016 +0000 |
| committer | Changpeng Fang <changpeng.fang@gmail.com> | Wed Aug 24 20:35:23 2016 +0000 |
| tree | 048e9a4a3f42b8c559b20e63f56516b5da2efd1f | |
| parent | 5f45722b036297388175ea34312b41ebb5bdb7ac [diff] |
AMDGCN/SI: Implement readlane/readfirstlane intrinsics Summary: This patch implements readlane/readfirstlane intrinsics. TODO: need to define a new register class to consider the case that the source could be a vector register or M0. Reviewed by: arsenm and tstellarAMD Differential Revision: http://reviews.llvm.org/D22489 llvm-svn: 279660