More SPU v2f32 stuff added: insertelement and shuffle.

llvm-svn: 110038
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
index 83726f2..3a945ce 100644
--- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -1624,6 +1624,7 @@
     SDValue T = DAG.getConstant(unsigned(SplatBits), VT.getVectorElementType());
     return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, T, T, T, T);
   }
+  case MVT::v2f32:
   case MVT::v2i32: {
     return SDValue();
   }
diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.td b/llvm/lib/Target/CellSPU/SPUInstrInfo.td
index 96b0d50..803ce56 100644
--- a/llvm/lib/Target/CellSPU/SPUInstrInfo.td
+++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.td
@@ -1584,6 +1584,9 @@
 def : Pat<(v4f32 (SPUprefslot2vec R32FP:$rA)),
           (ORv4f32_f32 R32FP:$rA)>;
 
+def : Pat<(v2f32 (SPUprefslot2vec R32FP:$rA)),
+          (ORv4f32_f32 R32FP:$rA)>;
+
 def : Pat<(v2f64 (SPUprefslot2vec R64FP:$rA)),
           (ORv2f64_f64 R64FP:$rA)>;
 
@@ -1608,6 +1611,9 @@
 def : Pat<(SPUvec2prefslot (v4f32 VECREG:$rA)),
           (ORf32_v4f32 VECREG:$rA)>;
 
+def : Pat<(SPUvec2prefslot (v2f32 VECREG:$rA)),
+          (ORf32_v4f32 VECREG:$rA)>;
+
 def : Pat<(SPUvec2prefslot (v2f64 VECREG:$rA)),
           (ORf64_v2f64 VECREG:$rA)>;
 
@@ -2150,6 +2156,8 @@
 
   def v4f32     : SHUFBVecInst<v4f32, v16i8>;
   def v4f32_m32 : SHUFBVecInst<v4f32, v4i32>;
+  def v2f32     : SHUFBVecInst<v2f32, v16i8>;
+  def v2f32_m32 : SHUFBVecInst<v2f32, v4i32>;
 
   def v2f64     : SHUFBVecInst<v2f64, v16i8>;
   def v2f64_m32 : SHUFBVecInst<v2f64, v4i32>;