PPC rotate instructions don't have unmodeled side effcts
llvm-svn: 178982
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 45beecd..5848291 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -495,6 +495,7 @@
[(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
+let neverHasSideEffects = 1 in {
let isCommutable = 1 in {
def RLDIMI : MDForm_1<30, 3,
(outs G8RC:$rA), (ins G8RC:$rSi, G8RC:$rS, u6imm:$SH, u6imm:$MB),
@@ -522,11 +523,12 @@
"rlwinm $rA, $rS, $SH, $MB, $ME", IntGeneral,
[]>;
-let isSelect = 1, neverHasSideEffects = 1 in
+let isSelect = 1 in
def ISEL8 : AForm_4<31, 15,
(outs G8RC:$rT), (ins G8RC_NOX0:$rA, G8RC:$rB, CRBITRC:$cond),
"isel $rT, $rA, $rB, $cond", IntGeneral,
[]>;
+} // neverHasSideEffects = 1
} // End FXU Operations.
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 5853681..142abe1 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1554,8 +1554,9 @@
}
}
+let neverHasSideEffects = 1 in {
let PPC970_Unit = 1 in { // FXU Operations.
- let isSelect = 1, neverHasSideEffects = 1 in
+ let isSelect = 1 in
def ISEL : AForm_4<31, 15,
(outs GPRC:$rT), (ins GPRC_NOR0:$rA, GPRC:$rB, CRBITRC:$cond),
"isel $rT, $rA, $rB, $cond", IntGeneral,
@@ -1586,7 +1587,7 @@
"rlwnm $rA, $rS, $rB, $MB, $ME", IntGeneral,
[]>;
}
-
+} // neverHasSideEffects = 1
//===----------------------------------------------------------------------===//
// PowerPC Instruction Patterns