[PowerPC] eliminate partially redundant compare instruction
This is a follow-on of D37211.
D37211 eliminates a compare instruction if two conditional branches can be made based on the one compare instruction, e.g.
if (a == 0) { ... }
else if (a < 0) { ... }
This patch extends this optimization to support partially redundant cases, which often happen in while loops.
For example, one compare instruction is moved from the loop body into the preheader by this optimization in the following example.
do {
if (a == 0) dummy1();
a = func(a);
} while (a > 0);
Differential Revision: https://reviews.llvm.org/D38236
llvm-svn: 314390
diff --git a/llvm/test/CodeGen/PowerPC/cmp_elimination.ll b/llvm/test/CodeGen/PowerPC/cmp_elimination.ll
index 3b87b7f..4839520 100644
--- a/llvm/test/CodeGen/PowerPC/cmp_elimination.ll
+++ b/llvm/test/CodeGen/PowerPC/cmp_elimination.ll
@@ -714,9 +714,43 @@
ret void
}
+; partially redundant case
+define void @func28(i32 signext %a) {
+; CHECK-LABEL: @func28
+; CHECK: cmplwi [[REG1:[0-9]+]], [[REG2:[0-9]+]]
+; CHECK: .[[LABEL1:[A-Z0-9_]+]]:
+; CHECK-NOT: cmp
+; CHECK: bne 0, .[[LABEL2:[A-Z0-9_]+]]
+; CHECK: bl dummy1
+; CHECK: .[[LABEL2]]:
+; CHECK: cmpwi [[REG1]], [[REG2]]
+; CHECK: bgt 0, .[[LABEL1]]
+; CHECK: blr
+entry:
+ br label %do.body
+
+do.body:
+ %a.addr.0 = phi i32 [ %a, %entry ], [ %call, %if.end ]
+ %cmp = icmp eq i32 %a.addr.0, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ tail call void @dummy1() #2
+ br label %if.end
+
+if.end:
+ %call = tail call signext i32 @func(i32 signext %a.addr.0) #2
+ %cmp1 = icmp sgt i32 %call, 0
+ br i1 %cmp1, label %do.body, label %do.end
+
+do.end:
+ ret void
+}
+
declare void @dummy1()
declare void @dummy2()
declare void @dummy3()
+declare signext i32 @func(i32 signext)
!1 = !{!"branch_weights", i32 2000, i32 1}
!2 = !{!"branch_weights", i32 1, i32 2000}