[InstCombine] narrow lshr with constant
Name: narrow_shift
Pre: C1 < 8
%zx = zext i8 %x to i32
%l = lshr i32 %zx, C1
=>
%narrowC = trunc i32 C1 to i8
%ns = lshr i8 %x, %narrowC
%l = zext i8 %ns to i32
http://rise4fun.com/Alive/jIV
This isn't directly applicable to PR34046 as written, but we
need to have more narrowing folds like this to be sure that
rotate patterns are recognized.
llvm-svn: 310060
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 7ed141c..f4e2458 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -680,6 +680,15 @@
return BinaryOperator::CreateAnd(X, ConstantInt::get(Ty, Mask));
}
+ if (match(Op0, m_OneUse(m_ZExt(m_Value(X)))) &&
+ (!Ty->isIntegerTy() || shouldChangeType(Ty, X->getType()))) {
+ unsigned SrcTyBitWidth = X->getType()->getScalarSizeInBits();
+ assert(ShAmt < SrcTyBitWidth && "Big shift not simplified to zero?");
+ // lshr (zext iM X to iN), C --> zext (lshr X, C) to iN
+ Value *NewLShr = Builder.CreateLShr(X, ShAmt);
+ return new ZExtInst(NewLShr, Ty);
+ }
+
if (match(Op0, m_SExt(m_Value(X))) &&
(!Ty->isIntegerTy() || shouldChangeType(Ty, X->getType()))) {
// Are we moving the sign bit to the low bit and widening with high zeros?