Revert "AMDGPU: enable 128-bit for local addr space under an option"
This reverts commit r329591.
It breaks various bots:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/16516
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/17374
http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/15992
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt
http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/11251
...
llvm-svn: 329610
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index b419334..ff6baf7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -426,12 +426,6 @@
"Enable SI Machine Scheduler"
>;
-def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
- "EnableDS128",
- "true",
- "Use ds_{read|write}_b128"
->;
-
// Unless +-flat-for-global is specified, turn on FlatForGlobal for
// all OS-es on VI and newer hardware to avoid assertion failures due
// to missing ADDR64 variants of MUBUF instructions.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 07ed04e..27b5799 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -132,7 +132,6 @@
EnableLoadStoreOpt(false),
EnableUnsafeDSOffsetFolding(false),
EnableSIScheduler(false),
- EnableDS128(false),
DumpCode(false),
FP64(false),
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index cd08026..e3455d3 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -133,7 +133,6 @@
bool EnableLoadStoreOpt;
bool EnableUnsafeDSOffsetFolding;
bool EnableSIScheduler;
- bool EnableDS128;
bool DumpCode;
// Subtarget statically properties set by tablegen
@@ -413,8 +412,8 @@
/// \returns If target supports ds_read/write_b128 and user enables generation
/// of ds_read/write_b128.
- bool useDS128() const {
- return CIInsts && EnableDS128;
+ bool useDS128(bool UserEnable) const {
+ return CIInsts && UserEnable;
}
/// \returns If MUBUF instructions always perform range checking, even for
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index bf560a9..9f097cd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -265,12 +265,10 @@
return 512;
}
- if (AddrSpace == AS.FLAT_ADDRESS)
- return 128;
-
- if (AddrSpace == AS.LOCAL_ADDRESS ||
+ if (AddrSpace == AS.FLAT_ADDRESS ||
+ AddrSpace == AS.LOCAL_ADDRESS ||
AddrSpace == AS.REGION_ADDRESS)
- return ST->useDS128() ? 128 : 64;
+ return 128;
if (AddrSpace == AS.PRIVATE_ADDRESS)
return 8 * ST->getMaxPrivateElementSize();
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 0829962..6f68f63 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -94,6 +94,11 @@
cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),
cl::init(false));
+static cl::opt<bool> EnableDS128(
+ "amdgpu-ds128",
+ cl::desc("Use DS_read/write_b128"),
+ cl::init(false));
+
static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(
"amdgpu-frame-index-zero-bits",
cl::desc("High bits of frame index assumed to be zero"),
@@ -5295,7 +5300,7 @@
}
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
// Use ds_read_b128 if possible.
- if (Subtarget->useDS128() && Load->getAlignment() >= 16 &&
+ if (Subtarget->useDS128(EnableDS128) && Load->getAlignment() >= 16 &&
MemVT.getStoreSize() == 16)
return SDValue();
@@ -5698,7 +5703,7 @@
}
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
// Use ds_write_b128 if possible.
- if (Subtarget->useDS128() && Store->getAlignment() >= 16 &&
+ if (Subtarget->useDS128(EnableDS128) && Store->getAlignment() >= 16 &&
VT.getStoreSize() == 16)
return SDValue();