diff --git a/llvm/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll b/llvm/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
index 2a0ef77..14bb313 100644
--- a/llvm/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
+++ b/llvm/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
 ; PR1279
 
 	%struct.rtx_def = type { i16, i8, i8, %struct.u }
diff --git a/llvm/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll b/llvm/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
index ea27676..8a62669 100644
--- a/llvm/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
+++ b/llvm/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
 ; PR1279
 
 	%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll b/llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
index 7b74e6c..b08c955 100644
--- a/llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
+++ b/llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin
+; RUN: llc < %s -mtriple=arm-apple-darwin
 
 	%struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
 	%struct.Q_TBL = type { [64 x i16], i32 }
diff --git a/llvm/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/llvm/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
index 421d501..21e2169 100644
--- a/llvm/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
+++ b/llvm/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm  | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 
 ; Check that calls to baz and quux are tail-merged.
 ; CHECK: bl _baz
@@ -10,7 +10,7 @@
 
 ; ModuleID = 'tail.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "i686-apple-darwin8"
+target triple = "arm-apple-darwin8"
 
 define i32 @f(i32 %i, i32 %q) {
 entry:
diff --git a/llvm/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll b/llvm/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
index 7b15ded..5ace899 100644
--- a/llvm/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
+++ b/llvm/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
 ; PR1406
 
 	%struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
diff --git a/llvm/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/llvm/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
index b8f2980..7669a03 100644
--- a/llvm/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
+++ b/llvm/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
@@ -1,6 +1,5 @@
-; RUN: llc < %s -march=arm | FileCheck %s
-; RUN: llc < %s -march=arm -enable-tail-merge=0 | \
-; RUN:   FileCheck --check-prefix=NOMERGE %s
+; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -enable-tail-merge=0 | FileCheck --check-prefix=NOMERGE %s
 
 ; Check that tail merging is the default on ARM, and that -enable-tail-merge=0
 ; works.
@@ -20,7 +19,7 @@
 
 ; ModuleID = 'tail.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "i686-apple-darwin8"
+target triple = "arm-apple-darwin8"
 
 define i32 @f(i32 %i, i32 %q) {
 entry:
diff --git a/llvm/test/CodeGen/ARM/2009-02-16-SpillerBug.ll b/llvm/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
index cad5440..bdb47fc 100644
--- a/llvm/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
+++ b/llvm/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
+; RUN: llc < %s -mattr=+v6,+vfp2
 
 target triple = "arm-apple-darwin9"
 	%struct.FILE_POS = type { i8, i8, i16, i32 }
diff --git a/llvm/test/CodeGen/ARM/2009-02-27-SpillerBug.ll b/llvm/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
index d9ec4d2..1584a88 100644
--- a/llvm/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
+++ b/llvm/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
+; RUN: llc < %s -mattr=+v6,+vfp2
 
 target triple = "arm-apple-darwin9"
 @a = external global double		; <double*> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll
index e9c4b03..a0e44ed 100644
--- a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll
+++ b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+; RUN: llc < %s -mtriple=armv6-apple-darwin9
 
 @nn = external global i32		; <i32*> [#uses=1]
 @al_len = external global i32		; <i32*> [#uses=2]
diff --git a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll
index 08291e6..d47d968 100644
--- a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll
+++ b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+; RUN: llc < %s -mtriple=armv6-apple-darwin9
 
 @no_mat = external global i32		; <i32*> [#uses=1]
 @no_mis = external global i32		; <i32*> [#uses=2]
diff --git a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
index cf7325d..d71744a 100644
--- a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
+++ b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+; RUN: llc < %s -mtriple=armv6-apple-darwin9
 
 @JJ = external global i32*		; <i32**> [#uses=1]
 
diff --git a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll
index 203608a..04cbc27 100644
--- a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll
+++ b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+; RUN: llc < %s -mtriple=armv6-apple-darwin9
 
 @r = external global i32		; <i32*> [#uses=1]
 @qr = external global i32		; <i32*> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll
index b3c91ed..4306210 100644
--- a/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll
+++ b/llvm/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+; RUN: llc < %s -mtriple=armv6-apple-darwin9
 
 @XX = external global i32*		; <i32**> [#uses=1]
 
diff --git a/llvm/test/CodeGen/ARM/2009-07-01-CommuteBug.ll b/llvm/test/CodeGen/ARM/2009-07-01-CommuteBug.ll
index 55039dd..730d3a3 100644
--- a/llvm/test/CodeGen/ARM/2009-07-01-CommuteBug.ll
+++ b/llvm/test/CodeGen/ARM/2009-07-01-CommuteBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+; RUN: llc < %s -mtriple=armv6-apple-darwin9
 
 @qr = external global i32		; <i32*> [#uses=1]
 @II = external global i32*		; <i32**> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll b/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
index e277b4c..8ead42d 100644
--- a/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
+++ b/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon
+; RUN: llc < %s -mattr=+neon
 ; PR4657
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill.ll b/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill.ll
index 0d258e6..dea5829 100644
--- a/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill.ll
+++ b/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 -post-RA-scheduler -mcpu=cortex-a8
+; RUN: llc < %s -mattr=+vfp2 -post-RA-scheduler -mcpu=cortex-a8
 
 ; ModuleID = '<stdin>'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll b/llvm/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll
index 0a9fd89..54db3a8 100644
--- a/llvm/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll
+++ b/llvm/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin9 -march=arm | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin9 | FileCheck %s
 
 ; CHECK: ldr r0, [[CPI_PERSONALITY:[A-Za-z0-9_]+]]
 ; CHECK: ldr r0, [[CPI_LSDA:[A-Za-z0-9_]+]]
diff --git a/llvm/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll b/llvm/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll
index 4437d37..3117b80 100644
--- a/llvm/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll
+++ b/llvm/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O1 -march=arm -mattr=+vfp2 -mtriple=arm-linux-gnueabi < %s | FileCheck %s
+; RUN: llc -O1 -mattr=+vfp2 -mtriple=arm-linux-gnueabi < %s | FileCheck %s
 ; pr4939
 
 define void @test(double* %x, double* %y) nounwind {
diff --git a/llvm/test/CodeGen/ARM/2010-05-14-IllegalType.ll b/llvm/test/CodeGen/ARM/2010-05-14-IllegalType.ll
index 99e5b09..e829366 100644
--- a/llvm/test/CodeGen/ARM/2010-05-14-IllegalType.ll
+++ b/llvm/test/CodeGen/ARM/2010-05-14-IllegalType.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=thumb -mcpu=cortex-a8 -mtriple=thumbv7-eabi -float-abi=hard < %s | FileCheck %s
+; RUN: llc -mcpu=cortex-a8 -mtriple=thumbv7-eabi -float-abi=hard < %s | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
 target triple = "thumbv7-apple-darwin10"
diff --git a/llvm/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll b/llvm/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll
index 47a5ef0..a1dcdd6 100644
--- a/llvm/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll
+++ b/llvm/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv4t-unknown-linux-gnueabi  | FileCheck %s
+; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi  | FileCheck %s
 ; PR 7433
 ; XFAIL: *
 
diff --git a/llvm/test/CodeGen/ARM/2011-09-19-cpsr.ll b/llvm/test/CodeGen/ARM/2011-09-19-cpsr.ll
index 749a6d2..a0205fc 100644
--- a/llvm/test/CodeGen/ARM/2011-09-19-cpsr.ll
+++ b/llvm/test/CodeGen/ARM/2011-09-19-cpsr.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=thumb -mcpu=cortex-a8 < %s
+; RUN: llc -mcpu=cortex-a8 < %s
 ; rdar://problem/10137436: sqlite3 miscompile
 ;
 ; CHECK: subs
diff --git a/llvm/test/CodeGen/ARM/2011-10-26-ExpandUnalignedLoadCrash.ll b/llvm/test/CodeGen/ARM/2011-10-26-ExpandUnalignedLoadCrash.ll
index 86596d6..6f6624d 100644
--- a/llvm/test/CodeGen/ARM/2011-10-26-ExpandUnalignedLoadCrash.ll
+++ b/llvm/test/CodeGen/ARM/2011-10-26-ExpandUnalignedLoadCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mcpu=cortex-a9 -mattr=+neon,+neonfp -relocation-model=pic
+; RUN: llc < %s -mcpu=cortex-a9 -mattr=+neon,+neonfp -relocation-model=pic
 
 target triple = "armv6-none-linux-gnueabi"
 
diff --git a/llvm/test/CodeGen/ARM/2011-10-26-memset-inline.ll b/llvm/test/CodeGen/ARM/2011-10-26-memset-inline.ll
index 5df4393..c3b7c4e 100644
--- a/llvm/test/CodeGen/ARM/2011-10-26-memset-inline.ll
+++ b/llvm/test/CodeGen/ARM/2011-10-26-memset-inline.ll
@@ -1,6 +1,6 @@
 ; Make sure short memsets on ARM lower to stores, even when optimizing for size.
-; RUN: llc -march=arm -mattr=+strict-align < %s | FileCheck %s -check-prefix=CHECK-GENERIC
-; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s -check-prefix=CHECK-UNALIGNED
+; RUN: llc -mattr=+strict-align < %s | FileCheck %s -check-prefix=CHECK-GENERIC
+; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s -check-prefix=CHECK-UNALIGNED
 
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
 target triple = "thumbv7-apple-ios5.0.0"
diff --git a/llvm/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll b/llvm/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll
index c9ea691..9ee205a 100644
--- a/llvm/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll
+++ b/llvm/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=arm -mcpu=cortex-a8 -verify-machineinstrs < %s
+; RUN: llc -mcpu=cortex-a8 -verify-machineinstrs < %s
 ; PR12165
 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-p:32:32:32-v128:32:32"
 target triple = "arm-none-linux"
diff --git a/llvm/test/CodeGen/ARM/2012-08-13-bfi.ll b/llvm/test/CodeGen/ARM/2012-08-13-bfi.ll
index 8263833..dbc26da 100644
--- a/llvm/test/CodeGen/ARM/2012-08-13-bfi.ll
+++ b/llvm/test/CodeGen/ARM/2012-08-13-bfi.ll
@@ -1,7 +1,7 @@
-; RUN: llc -march=thumb -mcpu=cortex-a8 < %s | FileCheck %s
+; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.8.0"
+target triple = "thumb-apple-macosx10.8.0"
 
 ; CHECK: foo
 ; CHECK-NOT: bfi
diff --git a/llvm/test/CodeGen/ARM/2012-08-27-CopyPhysRegCrash.ll b/llvm/test/CodeGen/ARM/2012-08-27-CopyPhysRegCrash.ll
index 6cff676..c1ce60f 100644
--- a/llvm/test/CodeGen/ARM/2012-08-27-CopyPhysRegCrash.ll
+++ b/llvm/test/CodeGen/ARM/2012-08-27-CopyPhysRegCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=cortex-a8 -march=thumb
+; RUN: llc < %s -mcpu=cortex-a8
 ; Test that this doesn't crash.
 ; <rdar://problem/12183003>
 
diff --git a/llvm/test/CodeGen/ARM/alloca.ll b/llvm/test/CodeGen/ARM/alloca.ll
index 82b6b11..efa0ae3 100644
--- a/llvm/test/CodeGen/ARM/alloca.ll
+++ b/llvm/test/CodeGen/ARM/alloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s
 
 define void @f(i32 %a) {
 entry:
diff --git a/llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll b/llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
index af05392..a248080 100644
--- a/llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
+++ b/llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
@@ -3,7 +3,7 @@
 ; RUN: llc -mtriple=thumb-eabi -arm-atomic-cfg-tidy=0 -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck -check-prefix=T2 %s
 ; RUN: llc -mtriple=thumbv8-eabi -arm-atomic-cfg-tidy=0 %s -o - | FileCheck -check-prefix=V8 %s
 
-; FIXME: The -march=thumb test doesn't change if -disable-peephole is specified.
+; FIXME: The -mtriple=thumb test doesn't change if -disable-peephole is specified.
 
 %struct.Foo = type { i8* }
 
diff --git a/llvm/test/CodeGen/ARM/big-endian-neon-bitconv.ll b/llvm/test/CodeGen/ARM/big-endian-neon-bitconv.ll
index b5a840a..462d675 100644
--- a/llvm/test/CodeGen/ARM/big-endian-neon-bitconv.ll
+++ b/llvm/test/CodeGen/ARM/big-endian-neon-bitconv.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march armeb -mtriple arm-eabi -mattr v7,neon -float-abi soft -o - | FileCheck %s
-; RUN: llc < %s -march armeb -mtriple arm-eabi -mattr v7,neon -float-abi hard -o - | FileCheck %s -check-prefix CHECK-HARD
+; RUN: llc < %s -mtriple armeb-eabi -mattr v7,neon -float-abi soft -o - | FileCheck %s
+; RUN: llc < %s -mtriple armeb-eabi -mattr v7,neon -float-abi hard -o - | FileCheck %s -check-prefix CHECK-HARD
 
 @v2i64 = global <2 x i64> zeroinitializer
 @v2i32 = global <2 x i32> zeroinitializer
diff --git a/llvm/test/CodeGen/ARM/call_nolink.ll b/llvm/test/CodeGen/ARM/call_nolink.ll
index 0cd5bcd..6a36a1e 100644
--- a/llvm/test/CodeGen/ARM/call_nolink.ll
+++ b/llvm/test/CodeGen/ARM/call_nolink.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | FileCheck %s
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
 
 	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
 @r = external global [14 x i32]		; <[14 x i32]*> [#uses=4]
diff --git a/llvm/test/CodeGen/ARM/cdp.ll b/llvm/test/CodeGen/ARM/cdp.ll
index 99ec3b2..5d79125 100644
--- a/llvm/test/CodeGen/ARM/cdp.ll
+++ b/llvm/test/CodeGen/ARM/cdp.ll
@@ -1,5 +1,5 @@
 ; RUN: not llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
-; RUN: not llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
+; RUN: not llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
 
 ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp
 define void @cdp(i32 %a) #0 {
diff --git a/llvm/test/CodeGen/ARM/cdp2.ll b/llvm/test/CodeGen/ARM/cdp2.ll
index c2a00d0..052e556 100644
--- a/llvm/test/CodeGen/ARM/cdp2.ll
+++ b/llvm/test/CodeGen/ARM/cdp2.ll
@@ -1,5 +1,5 @@
 ; RUN: not llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
-; RUN: not llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
+; RUN: not llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
 
 ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp2
 define void @cdp2(i32 %a) #0 {
diff --git a/llvm/test/CodeGen/ARM/cse-libcalls.ll b/llvm/test/CodeGen/ARM/cse-libcalls.ll
index 1255ec5..3e0d46c 100644
--- a/llvm/test/CodeGen/ARM/cse-libcalls.ll
+++ b/llvm/test/CodeGen/ARM/cse-libcalls.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin8"
+target triple = "arm-apple-darwin8"
 
 ; Without CSE of libcalls, there are two calls in the output instead of one.
 
diff --git a/llvm/test/CodeGen/ARM/deps-fix.ll b/llvm/test/CodeGen/ARM/deps-fix.ll
index 288697a..527d239 100644
--- a/llvm/test/CodeGen/ARM/deps-fix.ll
+++ b/llvm/test/CodeGen/ARM/deps-fix.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mcpu=cortex-a9 -mattr=+neon,+neonfp -float-abi=hard -mtriple armv7-linux-gnueabi | FileCheck %s
+; RUN: llc < %s -mcpu=cortex-a9 -mattr=+neon,+neonfp -float-abi=hard -mtriple armv7-linux-gnueabi | FileCheck %s
 
 ;; This test checks that the ExecutionDepsFix pass performs the domain changes
 ;; even when some dependencies are propagated through implicit definitions.
diff --git a/llvm/test/CodeGen/ARM/emutls1.ll b/llvm/test/CodeGen/ARM/emutls1.ll
index d4ba7ec..18d3264 100644
--- a/llvm/test/CodeGen/ARM/emutls1.ll
+++ b/llvm/test/CodeGen/ARM/emutls1.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -emulated-tls -march=arm -mtriple=arm-linux-androideabi \
+; RUN: llc < %s -emulated-tls -mtriple=arm-linux-androideabi \
 ; RUN:     | FileCheck %s
-; RUN: llc < %s -emulated-tls -march=arm -mtriple=arm-linux-androideabi \
+; RUN: llc < %s -emulated-tls -mtriple=arm-linux-androideabi \
 ; RUN:     -relocation-model=pic | FileCheck %s --check-prefix=PIC
 
 ; Compared with tls1.ll, emulated mode should not use __aeabi_read_tp or __tls_get_addr.
diff --git a/llvm/test/CodeGen/ARM/global-merge.ll b/llvm/test/CodeGen/ARM/global-merge.ll
index fd06f1e..9b41e70 100644
--- a/llvm/test/CodeGen/ARM/global-merge.ll
+++ b/llvm/test/CodeGen/ARM/global-merge.ll
@@ -1,5 +1,5 @@
 ; RUN: llc < %s -mtriple=thumb-apple-darwin -arm-global-merge -global-merge-group-by-use=false -global-merge-on-const=true | FileCheck %s
-; Test the ARMGlobalMerge pass.  Use -march=thumb because it has a small
+; Test the ARMGlobalMerge pass.  Use -mtriple=thumb because it has a small
 ; value for the maximum offset (127).
 
 ; A local array that exceeds the maximum offset should not be merged.
diff --git a/llvm/test/CodeGen/ARM/ifcvt-callback.ll b/llvm/test/CodeGen/ARM/ifcvt-callback.ll
index 62a66e7..a91b84b 100644
--- a/llvm/test/CodeGen/ARM/ifcvt-callback.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt-callback.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march thumb %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumb-- %s -o - | FileCheck %s
 
 ; This test checks that if-conversion pass is unconditionally added to the pass
 ; pipeline and is conditionally executed based on the per-function targert-cpu
diff --git a/llvm/test/CodeGen/ARM/mult-alt-generic-arm.ll b/llvm/test/CodeGen/ARM/mult-alt-generic-arm.ll
index 208b054..6ee114d 100644
--- a/llvm/test/CodeGen/ARM/mult-alt-generic-arm.ll
+++ b/llvm/test/CodeGen/ARM/mult-alt-generic-arm.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=arm -no-integrated-as
+; RUN: llc < %s -no-integrated-as
 ; ModuleID = 'mult-alt-generic.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
-target triple = "arm"
+target triple = "arm--"
 
 @mout0 = common global i32 0, align 4
 @min1 = common global i32 0, align 4
diff --git a/llvm/test/CodeGen/ARM/peephole-bitcast.ll b/llvm/test/CodeGen/ARM/peephole-bitcast.ll
index 3c6a187..6414cf6 100644
--- a/llvm/test/CodeGen/ARM/peephole-bitcast.ll
+++ b/llvm/test/CodeGen/ARM/peephole-bitcast.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -mtriple=arm-- -mcpu=cortex-a8 | FileCheck %s
 ; XFAIL: *
 ; PR11364
 
diff --git a/llvm/test/CodeGen/ARM/saxpy10-a9.ll b/llvm/test/CodeGen/ARM/saxpy10-a9.ll
index 91610f1..8245c47 100644
--- a/llvm/test/CodeGen/ARM/saxpy10-a9.ll
+++ b/llvm/test/CodeGen/ARM/saxpy10-a9.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=thumbv7-apple-ios7.0.0 -float-abi=hard -mcpu=cortex-a9 -misched-postra -enable-misched -pre-RA-sched=source -scheditins=false | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-ios7.0.0 -float-abi=hard -mcpu=cortex-a9 -misched-postra -enable-misched -pre-RA-sched=source -scheditins=false | FileCheck %s
 ;
 ; Test MI-Sched suppory latency based stalls on in in-order pipeline
 ; using the new machine model.
diff --git a/llvm/test/CodeGen/ARM/ssp-data-layout.ll b/llvm/test/CodeGen/ARM/ssp-data-layout.ll
index 39c279e..b087fa9 100644
--- a/llvm/test/CodeGen/ARM/ssp-data-layout.ll
+++ b/llvm/test/CodeGen/ARM/ssp-data-layout.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -disable-fp-elim -march=arm -mcpu=cortex-a8 -mtriple arm-linux-gnu -target-abi=apcs -o - | FileCheck %s
+; RUN: llc < %s -disable-fp-elim -mcpu=cortex-a8 -mtriple arm-linux-gnu -target-abi=apcs -o - | FileCheck %s
 ;  This test is fairly fragile.  The goal is to ensure that "large" stack
 ;  objects are allocated closest to the stack protector (i.e., farthest away 
 ;  from the Stack Pointer.)  In standard SSP mode this means that large (>=
diff --git a/llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll b/llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll
index 430ae3d..112a840 100644
--- a/llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll
+++ b/llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll
@@ -1,9 +1,9 @@
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - | FileCheck -check-prefix=NO-OPTION %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=+long-calls | FileCheck -check-prefix=LONGCALL %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=-long-calls | FileCheck -check-prefix=NO-LONGCALL %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+long-calls | FileCheck -check-prefix=LONGCALL %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-long-calls | FileCheck -check-prefix=NO-LONGCALL %s
+; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - | FileCheck -check-prefix=NO-OPTION %s
+; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=+long-calls | FileCheck -check-prefix=LONGCALL %s
+; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=-long-calls | FileCheck -check-prefix=NO-LONGCALL %s
+; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION %s
+; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+long-calls | FileCheck -check-prefix=LONGCALL %s
+; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-long-calls | FileCheck -check-prefix=NO-LONGCALL %s
 
 ; NO-OPTION-LABEL: {{_?}}caller0
 ; NO-OPTION: ldr [[R0:r[0-9]+]], [[L0:.*]] 
diff --git a/llvm/test/CodeGen/ARM/subtarget-no-movt.ll b/llvm/test/CodeGen/ARM/subtarget-no-movt.ll
index da535bc..fb0d5ad 100644
--- a/llvm/test/CodeGen/ARM/subtarget-no-movt.ll
+++ b/llvm/test/CodeGen/ARM/subtarget-no-movt.ll
@@ -1,9 +1,9 @@
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - | FileCheck -check-prefix=NO-OPTION %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION-O0 %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT-O0 %s
-; RUN: llc -march thumb -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT-O0 %s
+; RUN: llc -mcpu=cortex-a8 -relocation-model=static %s -o - | FileCheck -check-prefix=NO-OPTION %s
+; RUN: llc -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT %s
+; RUN: llc -mcpu=cortex-a8 -relocation-model=static %s -o - -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT %s
+; RUN: llc -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION-O0 %s
+; RUN: llc -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-no-movt | FileCheck -check-prefix=USE-MOVT-O0 %s
+; RUN: llc -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+no-movt | FileCheck -check-prefix=NO-USE-MOVT-O0 %s
 
 target triple = "thumb-apple-darwin"
 
diff --git a/llvm/test/CodeGen/ARM/thumb1-div.ll b/llvm/test/CodeGen/ARM/thumb1-div.ll
index 844dfe6..0bcaa10 100644
--- a/llvm/test/CodeGen/ARM/thumb1-div.ll
+++ b/llvm/test/CodeGen/ARM/thumb1-div.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-m23 -march=thumb | \
+; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m23 | \
 ; RUN:     FileCheck %s -check-prefix=CHECK
 
 define i32 @f1(i32 %a, i32 %b) {
diff --git a/llvm/test/CodeGen/ARM/tls-models.ll b/llvm/test/CodeGen/ARM/tls-models.ll
index d8c74d2..0a82f4d 100644
--- a/llvm/test/CodeGen/ARM/tls-models.ll
+++ b/llvm/test/CodeGen/ARM/tls-models.ll
@@ -1,10 +1,10 @@
-; RUN: llc -march=arm -mtriple=arm-linux-gnueabi < %s \
+; RUN: llc -mtriple=arm-linux-gnueabi < %s \
 ; RUN:     | FileCheck -check-prefix=CHECK-NONPIC -check-prefix=COMMON %s
-; RUN: llc -march=arm -mtriple=arm-linux-gnueabi -relocation-model=pic < %s \
+; RUN: llc -mtriple=arm-linux-gnueabi -relocation-model=pic < %s \
 ; RUN:     | FileCheck -check-prefix=CHECK-PIC  -check-prefix=COMMON %s
-; RUN: llc -emulated-tls -march=arm -mtriple=arm-linux-gnueabi < %s \
+; RUN: llc -emulated-tls -mtriple=arm-linux-gnueabi < %s \
 ; RUN:     | FileCheck -check-prefix=EMUNONPIC -check-prefix=EMU -check-prefix=COMMON %s
-; RUN: llc -emulated-tls -march=arm -mtriple=arm-linux-gnueabi -relocation-model=pic < %s \
+; RUN: llc -emulated-tls -mtriple=arm-linux-gnueabi -relocation-model=pic < %s \
 ; RUN:     | FileCheck -check-prefix=EMUPIC -check-prefix=EMU -check-prefix=COMMON %s
 
 
diff --git a/llvm/test/CodeGen/ARM/tls1.ll b/llvm/test/CodeGen/ARM/tls1.ll
index d492522..496d333 100644
--- a/llvm/test/CodeGen/ARM/tls1.ll
+++ b/llvm/test/CodeGen/ARM/tls1.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | FileCheck %s
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi -relocation-model=pic | \
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -relocation-model=pic | \
 ; RUN:   FileCheck %s --check-prefix=PIC
 
 
diff --git a/llvm/test/CodeGen/ARM/tls2.ll b/llvm/test/CodeGen/ARM/tls2.ll
index d522da8..ddea6c0 100644
--- a/llvm/test/CodeGen/ARM/tls2.ll
+++ b/llvm/test/CodeGen/ARM/tls2.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
+; RUN: llc < %s -mtriple=arm-linux-gnueabi \
 ; RUN:   | FileCheck %s -check-prefix=CHECK-NONPIC
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
-; RUN:   -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -relocation-model=pic \
+; RUN:   | FileCheck %s -check-prefix=CHECK-PIC
 
 @i = external thread_local global i32		; <i32*> [#uses=2]
 
diff --git a/llvm/test/CodeGen/ARM/unsafe-fsub.ll b/llvm/test/CodeGen/ARM/unsafe-fsub.ll
index 3a4477d..0c5702a 100644
--- a/llvm/test/CodeGen/ARM/unsafe-fsub.ll
+++ b/llvm/test/CodeGen/ARM/unsafe-fsub.ll
@@ -1,5 +1,5 @@
-; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s
-; RUN: llc -march=arm -mcpu=cortex-a9 -enable-unsafe-fp-math < %s | FileCheck -check-prefix=FAST %s
+; RUN: llc -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s
+; RUN: llc -mcpu=cortex-a9 -enable-unsafe-fp-math < %s | FileCheck -check-prefix=FAST %s
 
 target triple = "armv7-apple-ios"
 
diff --git a/llvm/test/CodeGen/ARM/vargs_align.ll b/llvm/test/CodeGen/ARM/vargs_align.ll
index 6dc7135..e01ceeb 100644
--- a/llvm/test/CodeGen/ARM/vargs_align.ll
+++ b/llvm/test/CodeGen/ARM/vargs_align.ll
@@ -1,5 +1,5 @@
 ; RUN: llc < %s -mtriple=armv7-linux-gnueabihf | FileCheck %s -check-prefix=EABI
-; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=OABI
+; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=OABI
 
 define i32 @f(i32 %a, ...) {
 entry:
diff --git a/llvm/test/CodeGen/ARM/vcvt-cost.ll b/llvm/test/CodeGen/ARM/vcvt-cost.ll
index c80450a..2ee7a31 100644
--- a/llvm/test/CodeGen/ARM/vcvt-cost.ll
+++ b/llvm/test/CodeGen/ARM/vcvt-cost.ll
@@ -1,7 +1,7 @@
 ; We currently estimate the cost of sext/zext/trunc v8(v16)i32 <-> v8(v16)i8
 ; instructions as expensive. If lowering is improved the cost model needs to
 ; change.
-; RUN: opt < %s  -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST
+; RUN: opt < %s  -cost-model -analyze -mtriple=arm-apple-ios6.0.0 -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST
 %T0_5 = type <8 x i8>
 %T1_5 = type <8 x i32>
 ; CHECK-LABEL: func_cvt5:
diff --git a/llvm/test/CodeGen/ARM/vector-spilling.ll b/llvm/test/CodeGen/ARM/vector-spilling.ll
index 9e3225e..a1942eb 100644
--- a/llvm/test/CodeGen/ARM/vector-spilling.ll
+++ b/llvm/test/CodeGen/ARM/vector-spilling.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv7-linux-gnueabihf -arm-atomic-cfg-tidy=0 -float-abi=hard -mcpu=cortex-a9 -O3 | FileCheck %s
+; RUN: llc < %s -mtriple=armv7-linux-gnueabihf -arm-atomic-cfg-tidy=0 -float-abi=hard -mcpu=cortex-a9 -O3 | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32-S64"
 
diff --git a/llvm/test/CodeGen/ARM/vfloatintrinsics.ll b/llvm/test/CodeGen/ARM/vfloatintrinsics.ll
index 393a1e6..b4c5061 100644
--- a/llvm/test/CodeGen/ARM/vfloatintrinsics.ll
+++ b/llvm/test/CodeGen/ARM/vfloatintrinsics.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mcpu=swift -march=arm < %s | FileCheck %s
+; RUN: llc -mcpu=swift < %s | FileCheck %s
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
-target triple = "thumbv7-apple-ios6.1.0"
+target triple = "arm-apple-ios6.1.0"
 
 ;;; Float vectors
 
diff --git a/llvm/test/CodeGen/ARM/vldm-sched-a9.ll b/llvm/test/CodeGen/ARM/vldm-sched-a9.ll
index 0e0cf97..57387d5 100644
--- a/llvm/test/CodeGen/ARM/vldm-sched-a9.ll
+++ b/llvm/test/CodeGen/ARM/vldm-sched-a9.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple=armv7-linux-gnueabihf -arm-atomic-cfg-tidy=0 -float-abi=hard -mcpu=cortex-a9 -O3 | FileCheck %s
+; RUN: llc < %s -mtriple=armv7-linux-gnueabihf -arm-atomic-cfg-tidy=0 -float-abi=hard -mcpu=cortex-a9 -O3 | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32-S64"
 
diff --git a/llvm/test/CodeGen/ARM/vselect_imax.ll b/llvm/test/CodeGen/ARM/vselect_imax.ll
index 85c8c5c..e212b37 100644
--- a/llvm/test/CodeGen/ARM/vselect_imax.ll
+++ b/llvm/test/CodeGen/ARM/vselect_imax.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s  -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST
+; RUN: opt < %s  -cost-model -analyze -mtriple=arm-apple-ios6.0.0 -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST
 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
 ; Make sure that ARM backend with NEON handles vselect.
 
diff --git a/llvm/test/CodeGen/ARM/zextload_demandedbits.ll b/llvm/test/CodeGen/ARM/zextload_demandedbits.ll
index ba7393c..80f212e 100644
--- a/llvm/test/CodeGen/ARM/zextload_demandedbits.ll
+++ b/llvm/test/CodeGen/ARM/zextload_demandedbits.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mtriple="thumbv7-apple-ios3.0.0" | FileCheck %s
+; RUN: llc < %s -mtriple="arm-apple-ios3.0.0" | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
 
diff --git a/llvm/test/CodeGen/Thumb2/constant-islands.ll b/llvm/test/CodeGen/Thumb2/constant-islands.ll
index 5838491..81a1f35 100644
--- a/llvm/test/CodeGen/Thumb2/constant-islands.ll
+++ b/llvm/test/CodeGen/Thumb2/constant-islands.ll
@@ -1,9 +1,8 @@
-; RUN: llc < %s -march=arm   -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o
-; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o
-; RUN: llc < %s -march=arm   -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o
-; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o
+; RUN: llc < %s -mtriple=arm-apple-ios   -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o
+; RUN: llc < %s -mtriple=thumb-apple-ios -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o
+; RUN: llc < %s -mtriple=arm-apple-ios   -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o
+; RUN: llc < %s -mtriple=thumb-apple-ios -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
-target triple = "thumbv7-apple-ios"
 
 ; This function comes from the Bullet test.  It is quite big, and exercises the
 ; constant island pass a bit.  It has caused failures, including
diff --git a/llvm/test/CodeGen/Thumb2/cortex-fp.ll b/llvm/test/CodeGen/Thumb2/cortex-fp.ll
index 5548492..ab2dd59 100644
--- a/llvm/test/CodeGen/Thumb2/cortex-fp.ll
+++ b/llvm/test/CodeGen/Thumb2/cortex-fp.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM3
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM4
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM7
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXA8
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM3
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM4
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM7
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXA8
 
 
 define float @foo(float %a, float %b) {
diff --git a/llvm/test/CodeGen/Thumb2/intrinsics-coprocessor.ll b/llvm/test/CodeGen/Thumb2/intrinsics-coprocessor.ll
index 248ec22..70f1e5e 100644
--- a/llvm/test/CodeGen/Thumb2/intrinsics-coprocessor.ll
+++ b/llvm/test/CodeGen/Thumb2/intrinsics-coprocessor.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 -show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 -show-mc-encoding | FileCheck %s
 define void @coproc(i8* %i) nounwind {
 entry:
   ; CHECK: mrc p7, #1, r{{[0-9]+}}, c1, c1, #4
diff --git a/llvm/test/CodeGen/Thumb2/large-stack.ll b/llvm/test/CodeGen/Thumb2/large-stack.ll
index 4fe4982..158be9f 100644
--- a/llvm/test/CodeGen/Thumb2/large-stack.ll
+++ b/llvm/test/CodeGen/Thumb2/large-stack.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
-; RUN:  -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
-; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
-; RUN:  -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mcpu=arm1156t2-s -mattr=+thumb2 -mtriple=thumb-apple-darwin \
+; RUN:    | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mcpu=arm1156t2-s -mattr=+thumb2 -mtriple=thumb-linux-gnueabi \
+; RUN:    | FileCheck %s -check-prefix=LINUX
 
 define void @test1() {
 ; DARWIN-LABEL: test1:
diff --git a/llvm/test/CodeGen/Thumb2/segmented-stacks.ll b/llvm/test/CodeGen/Thumb2/segmented-stacks.ll
index 38bf915..49627fb 100644
--- a/llvm/test/CodeGen/Thumb2/segmented-stacks.ll
+++ b/llvm/test/CodeGen/Thumb2/segmented-stacks.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=thumb-linux-androideabi -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-android
-; RUN: llc < %s -mtriple=thumb-linux-androideabi -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 -filetype=obj
+; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-android
+; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -filetype=obj
 
 
 ; Just to prevent the alloca from being optimized away
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-rev16.ll b/llvm/test/CodeGen/Thumb2/thumb2-rev16.ll
index 3e26587..762e104 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-rev16.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-rev16.ll
@@ -1,7 +1,7 @@
 ; XFAIL: *
 ; fixme rev16 pattern is not matching
 
-; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]*" | count 1
+; RUN: llc < %s -mtriple=thumb-- -mcpu=arm1156t2-s -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]*" | count 1
 
 ; 0xff00ff00 = 4278255360
 ; 0x00ff00ff = 16711935