commit 7d7adf4f2e4e50f738a5f692e6f011dcfca6b070
author Matt Arsenault <Matthew.Arsenault@amd.com> Thu Dec 14 22:34:10 2017 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Thu Dec 14 22:34:10 2017 +0000
tree df846d9653c67e5bcd684da57d8dc97665c057b3
parent c7bc461298d540cefec9ffe370f68dfbca367e8b

TLI: Allow using PSV for intrinsic mem operands

llvm-svn: 320756

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 1391677..a0d8136 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -851,7 +851,7 @@
   const TargetLowering &TLI = *MF->getSubtarget().getTargetLowering();
   TargetLowering::IntrinsicInfo Info;
   // TODO: Add a GlobalISel version of getTgtMemIntrinsic.
-  if (TLI.getTgtMemIntrinsic(Info, CI, ID)) {
+  if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) {
     uint64_t Size = Info.memVT.getStoreSize();
     MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal),
                                                Info.flags, Size, Info.align));