Don't add implicit regs
llvm-svn: 4840
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp
index 992fba7..d9facda 100644
--- a/llvm/lib/Target/X86/InstSelectSimple.cpp
+++ b/llvm/lib/Target/X86/InstSelectSimple.cpp
@@ -502,7 +502,7 @@
if (isSigned) {
// Emit a sign extension instruction...
- BuildMI(BB, ExtOpcode[Class], 1, ExtReg).addReg(Reg);
+ BuildMI(BB, ExtOpcode[Class], 0);
} else {
// If unsigned, emit a zeroing instruction... (reg = xor reg, reg)
BuildMI(BB, ClrOpcode[Class], 2, ExtReg).addReg(ExtReg).addReg(ExtReg);