commit 7e4bde71c5ccf0226dad12fac0dbb17492932bb9
author Reid Spencer <rspencer@reidspencer.com> Sat Apr 14 18:30:06 2007 +0000
committer Reid Spencer <rspencer@reidspencer.com> Sat Apr 14 18:30:06 2007 +0000
tree 48e40289eb66caf54fbcfb177830d2b9187cc8b0
parent 26f762270fa5dcd4d4cbe0068da8fb8a7aeeaad8

bool -> i1 (found by llvm.exp)

llvm-svn: 36005

llvm/test/Transforms/InstCombine/apint-div2.ll

diff --git a/llvm/test/Transforms/InstCombine/apint-div2.ll b/llvm/test/Transforms/InstCombine/apint-div2.ll
index ba849e2..2aa2c3a 100644
--- a/llvm/test/Transforms/InstCombine/apint-div2.ll
+++ b/llvm/test/Transforms/InstCombine/apint-div2.ll
@@ -1,7 +1,6 @@
 ; This test makes sure that div instructions are properly eliminated.
 ; This test is for Integer BitWidth >= 64 && BitWidth <= 1024.
 ;
-
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep div
 
 
@@ -16,8 +15,8 @@
     ret i499 %Y
 }
 
-define i599 @test3(i599 %X, bool %C) {
-        %V = select bool %C, i599 70368744177664, i599 4096
+define i599 @test3(i599 %X, i1 %C) {
+        %V = select i1 %C, i599 70368744177664, i599 4096
         %R = udiv i599 %X, %V
         ret i599 %R
 }