Revert "Debug info: Emit values in subregisters that do not have a separate"
This reverts commit r201179 for buildbot breakage.
llvm-svn: 201188
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index c0f3686..ff24416 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -868,14 +868,12 @@
bool Indirect) const {
const TargetRegisterInfo *TRI = TM.getRegisterInfo();
int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
- bool isSubRegister = Reg < 0;
- unsigned Idx = 0;
for (MCSuperRegIterator SR(MLoc.getReg(), TRI); SR.isValid() && Reg < 0;
++SR) {
Reg = TRI->getDwarfRegNum(*SR, false);
- if (Reg >= 0)
- Idx = TRI->getSubRegIndex(*SR, MLoc.getReg());
+ // FIXME: Get the bit range this register uses of the superregister
+ // so that we can produce a DW_OP_bit_piece
}
// FIXME: Handle cases like a super register being encoded as
@@ -912,24 +910,7 @@
}
}
- // Emit Mask
- if (isSubRegister) {
- unsigned Size = TRI->getSubRegIdxSize(Idx);
- unsigned Offset = TRI->getSubRegIdxOffset(Idx);
- if (Offset > 0) {
- OutStreamer.AddComment("DW_OP_bit_piece");
- EmitInt8(dwarf::DW_OP_bit_piece);
- OutStreamer.AddComment(Twine(Size));
- EmitULEB128(Size);
- OutStreamer.AddComment(Twine(Offset));
- EmitULEB128(Offset);
- } else {
- OutStreamer.AddComment("DW_OP_piece");
- EmitInt8(dwarf::DW_OP_piece);
- OutStreamer.AddComment(Twine(Size));
- EmitULEB128(Size);
- }
- }
+ // FIXME: Produce a DW_OP_bit_piece if we used a superregister
}
bool AsmPrinter::doFinalization(Module &M) {