AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
llvm-svn: 275619
diff --git a/llvm/test/CodeGen/AMDGPU/r600-encoding.ll b/llvm/test/CodeGen/AMDGPU/r600-encoding.ll
index 99a7893..e14b306 100644
--- a/llvm/test/CodeGen/AMDGPU/r600-encoding.ll
+++ b/llvm/test/CodeGen/AMDGPU/r600-encoding.ll
@@ -16,8 +16,8 @@
%r1 = extractelement <4 x float> %reg0, i32 1
%r2 = fmul float %r0, %r1
%vec = insertelement <4 x float> undef, float %r2, i32 0
- call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
+ call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
ret void
}
-declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
+declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)