commit 840beec2d0855db9165c02bc29a79af8e357fc24
author Craig Topper <craig.topper@gmail.com> Fri Apr 04 05:16:06 2014 +0000
committer Craig Topper <craig.topper@gmail.com> Fri Apr 04 05:16:06 2014 +0000
tree cc21088e8d06f5c3158cd6fc7e00b483c9f0a817
parent 79ed5d44e715537a933c399885dce58c7d877f73

Make consistent use of MCPhysReg instead of uint16_t throughout the tree.

llvm-svn: 205610

llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp

diff --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
index 463eb86..c84137a 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
@@ -75,7 +75,7 @@
   // callee-saved register that is not saved in the prolog.
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   BitVector Pristine = MFI->getPristineRegs(BB);
-  for (const uint16_t *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
+  for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
     if (!IsReturnBlock && !Pristine.test(*I)) continue;
     for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) {
       unsigned Reg = *AI;