commit 840beec2d0855db9165c02bc29a79af8e357fc24
author Craig Topper <craig.topper@gmail.com> Fri Apr 04 05:16:06 2014 +0000
committer Craig Topper <craig.topper@gmail.com> Fri Apr 04 05:16:06 2014 +0000
tree cc21088e8d06f5c3158cd6fc7e00b483c9f0a817
parent 79ed5d44e715537a933c399885dce58c7d877f73

Make consistent use of MCPhysReg instead of uint16_t throughout the tree.

llvm-svn: 205610

llvm/lib/Target/ARM/Thumb1FrameLowering.cpp

diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
index 2224652..be29dc5 100644
--- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -293,7 +293,7 @@
     AFI->setShouldRestoreSPFromFP(true);
 }
 
-static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
+static bool isCSRestore(MachineInstr *MI, const MCPhysReg *CSRegs) {
   if (MI->getOpcode() == ARM::tLDRspi &&
       MI->getOperand(1).isFI() &&
       isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
@@ -328,7 +328,7 @@
   int NumBytes = (int)MFI->getStackSize();
   assert((unsigned)NumBytes >= ArgRegsSaveSize &&
          "ArgRegsSaveSize is included in NumBytes");
-  const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
+  const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs();
   unsigned FramePtr = RegInfo->getFrameRegister(MF);
 
   if (!AFI->hasStackFrame()) {