verify-uselistorder: Change the default -num-shuffles=5
Change the default for `-num-shuffles` to 5 and better document the
algorithm in the header docs of `verify-uselistorder`.
llvm-svn: 214419
diff --git a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
index 461a92a..9c238db 100644
--- a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
+++ b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -1,7 +1,7 @@
; This test ensures that we get a bitcast constant expression in and out,
; not a sitofp constant expression.
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; CHECK: bitcast (
@G = external global i32
diff --git a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
index 16f7e9a..e45ddac 100644
--- a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
+++ b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; PR4373
@foo = weak global { i32 } zeroinitializer
diff --git a/llvm/test/Bitcode/aggregateInstructions.3.2.ll b/llvm/test/Bitcode/aggregateInstructions.3.2.ll
index 2853823..bb93afe 100644
--- a/llvm/test/Bitcode/aggregateInstructions.3.2.ll
+++ b/llvm/test/Bitcode/aggregateInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread instructions with aggregate operands
diff --git a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index c1eba94..6d309bd 100644
--- a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; Tests vclz and vcnt
define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
diff --git a/llvm/test/Bitcode/atomic.ll b/llvm/test/Bitcode/atomic.ll
index bccb868..e45ef16 100644
--- a/llvm/test/Bitcode/atomic.ll
+++ b/llvm/test/Bitcode/atomic.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
diff --git a/llvm/test/Bitcode/attributes-3.3.ll b/llvm/test/Bitcode/attributes-3.3.ll
index 359d7ce..441e356 100644
--- a/llvm/test/Bitcode/attributes-3.3.ll
+++ b/llvm/test/Bitcode/attributes-3.3.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
; The test checks that LLVM does not silently misread attributes of
diff --git a/llvm/test/Bitcode/attributes.ll b/llvm/test/Bitcode/attributes.ll
index 8286e39..1543558 100644
--- a/llvm/test/Bitcode/attributes.ll
+++ b/llvm/test/Bitcode/attributes.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; PR12696
define void @f1(i8 zeroext)
diff --git a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
index 4df5710..30c21da 100644
--- a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
+++ b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary float instructions from
diff --git a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
index 4559b4f..ba10399 100644
--- a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
+++ b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary integer instructions from
diff --git a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
index f6d4657..ad25110 100644
--- a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread bitwise instructions from
diff --git a/llvm/test/Bitcode/calling-conventions.3.2.ll b/llvm/test/Bitcode/calling-conventions.3.2.ll
index e1f1634..6f3d1d0 100644
--- a/llvm/test/Bitcode/calling-conventions.3.2.ll
+++ b/llvm/test/Bitcode/calling-conventions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread calling conventions of
diff --git a/llvm/test/Bitcode/case-ranges-3.3.ll b/llvm/test/Bitcode/case-ranges-3.3.ll
index eaab6ec..1998b35 100644
--- a/llvm/test/Bitcode/case-ranges-3.3.ll
+++ b/llvm/test/Bitcode/case-ranges-3.3.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
; release of LLVM. This tests that the bitcode for switches from that release
diff --git a/llvm/test/Bitcode/cmpxchg-upgrade.ll b/llvm/test/Bitcode/cmpxchg-upgrade.ll
index 2a69ec5..78a9cc9 100644
--- a/llvm/test/Bitcode/cmpxchg-upgrade.ll
+++ b/llvm/test/Bitcode/cmpxchg-upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.
diff --git a/llvm/test/Bitcode/conversionInstructions.3.2.ll b/llvm/test/Bitcode/conversionInstructions.3.2.ll
index 550d443..2aa1564 100644
--- a/llvm/test/Bitcode/conversionInstructions.3.2.ll
+++ b/llvm/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread conversion instructions from
diff --git a/llvm/test/Bitcode/drop-debug-info.ll b/llvm/test/Bitcode/drop-debug-info.ll
index ee86011..d2f281a 100644
--- a/llvm/test/Bitcode/drop-debug-info.ll
+++ b/llvm/test/Bitcode/drop-debug-info.ll
@@ -1,6 +1,6 @@
; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
; RUN: llvm-dis < %t.bc | FileCheck %s
-; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order
define i32 @main() {
entry:
diff --git a/llvm/test/Bitcode/extractelement.ll b/llvm/test/Bitcode/extractelement.ll
index ba806a4..945dd39 100644
--- a/llvm/test/Bitcode/extractelement.ll
+++ b/llvm/test/Bitcode/extractelement.ll
@@ -1,5 +1,5 @@
; RUN: opt < %s -constprop | llvm-dis -disable-output
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; PR3465
define double @test() {
diff --git a/llvm/test/Bitcode/flags.ll b/llvm/test/Bitcode/flags.ll
index a996a8a..17e923d 100644
--- a/llvm/test/Bitcode/flags.ll
+++ b/llvm/test/Bitcode/flags.ll
@@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llvm-dis > %t0
; RUN: opt -S < %s > %t1
; RUN: diff %t0 %t1
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; PR6140
; Make sure the flags are serialized/deserialized properly for both
diff --git a/llvm/test/Bitcode/function-encoding-rel-operands.ll b/llvm/test/Bitcode/function-encoding-rel-operands.ll
index 14aa01f..02265f9 100644
--- a/llvm/test/Bitcode/function-encoding-rel-operands.ll
+++ b/llvm/test/Bitcode/function-encoding-rel-operands.ll
@@ -1,7 +1,7 @@
; Basic sanity test to check that instruction operands are encoded with
; relative IDs.
; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; CHECK: FUNCTION_BLOCK
; CHECK: INST_BINOP {{.*}}op0=1 op1=1
diff --git a/llvm/test/Bitcode/global-variables.3.2.ll b/llvm/test/Bitcode/global-variables.3.2.ll
index cbba464a..dec4694 100644
--- a/llvm/test/Bitcode/global-variables.3.2.ll
+++ b/llvm/test/Bitcode/global-variables.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread global variables attributes of
diff --git a/llvm/test/Bitcode/inalloca.ll b/llvm/test/Bitcode/inalloca.ll
index 386a476..b855005 100644
--- a/llvm/test/Bitcode/inalloca.ll
+++ b/llvm/test/Bitcode/inalloca.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; inalloca should roundtrip.
diff --git a/llvm/test/Bitcode/linkage-types-3.2.ll b/llvm/test/Bitcode/linkage-types-3.2.ll
index 06e81b9..a3791aa 100644
--- a/llvm/test/Bitcode/linkage-types-3.2.ll
+++ b/llvm/test/Bitcode/linkage-types-3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
; The test checks that LLVM does not silently misread linkage types of
diff --git a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
index f75e94d..dfd0d83 100644
--- a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
+++ b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file
; to llvm-as-3.4. The test checks that LLVM upgrades visibility of symbols
diff --git a/llvm/test/Bitcode/memInstructions.3.2.ll b/llvm/test/Bitcode/memInstructions.3.2.ll
index 67d24f4..8b0c850 100644
--- a/llvm/test/Bitcode/memInstructions.3.2.ll
+++ b/llvm/test/Bitcode/memInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread memory related instructions of
diff --git a/llvm/test/Bitcode/metadata.ll b/llvm/test/Bitcode/metadata.ll
index 1ceb606..c721bd4 100644
--- a/llvm/test/Bitcode/metadata.ll
+++ b/llvm/test/Bitcode/metadata.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
!llvm.foo = !{!0}
!0 = metadata !{i32 42}
diff --git a/llvm/test/Bitcode/miscInstructions.3.2.ll b/llvm/test/Bitcode/miscInstructions.3.2.ll
index ccef8df..bd7aa9c 100644
--- a/llvm/test/Bitcode/miscInstructions.3.2.ll
+++ b/llvm/test/Bitcode/miscInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; miscInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread miscellaneous instructions of
diff --git a/llvm/test/Bitcode/old-aliases.ll b/llvm/test/Bitcode/old-aliases.ll
index b32bc1b..f77caff 100644
--- a/llvm/test/Bitcode/old-aliases.ll
+++ b/llvm/test/Bitcode/old-aliases.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk)
; from when aliases contained a ConstantExpr.
diff --git a/llvm/test/Bitcode/ptest-new.ll b/llvm/test/Bitcode/ptest-new.ll
index ff28481..66ef530 100644
--- a/llvm/test/Bitcode/ptest-new.ll
+++ b/llvm/test/Bitcode/ptest-new.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
define i32 @foo(<2 x i64> %bar) nounwind {
entry:
diff --git a/llvm/test/Bitcode/ptest-old.ll b/llvm/test/Bitcode/ptest-old.ll
index 5f252aa..e4d826b 100644
--- a/llvm/test/Bitcode/ptest-old.ll
+++ b/llvm/test/Bitcode/ptest-old.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
define i32 @foo(<4 x float> %bar) nounwind {
entry:
diff --git a/llvm/test/Bitcode/select.ll b/llvm/test/Bitcode/select.ll
index a33926c..5a5a524 100644
--- a/llvm/test/Bitcode/select.ll
+++ b/llvm/test/Bitcode/select.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
define <2 x i32> @main() {
ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)
diff --git a/llvm/test/Bitcode/shuffle.ll b/llvm/test/Bitcode/shuffle.ll
index 5b0e9e7..a9e94f6 100644
--- a/llvm/test/Bitcode/shuffle.ll
+++ b/llvm/test/Bitcode/shuffle.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; <rdar://problem/8622574>
; tests the bitcodereader can handle the case where the reader will initially
diff --git a/llvm/test/Bitcode/ssse3_palignr.ll b/llvm/test/Bitcode/ssse3_palignr.ll
index 4a612ec..d75fe15 100644
--- a/llvm/test/Bitcode/ssse3_palignr.ll
+++ b/llvm/test/Bitcode/ssse3_palignr.ll
@@ -1,5 +1,5 @@
; RUN: opt < %s -S | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; CHECK-NOT: {@llvm\\.palign}
define <4 x i32> @align1(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp {
diff --git a/llvm/test/Bitcode/tailcall.ll b/llvm/test/Bitcode/tailcall.ll
index 5eed7a3..2664574 100644
--- a/llvm/test/Bitcode/tailcall.ll
+++ b/llvm/test/Bitcode/tailcall.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; Check that musttail and tail roundtrip.
diff --git a/llvm/test/Bitcode/terminatorInstructions.3.2.ll b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
index a2285a13..96876fb 100644
--- a/llvm/test/Bitcode/terminatorInstructions.3.2.ll
+++ b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread terminator instructions from
diff --git a/llvm/test/Bitcode/upgrade-global-ctors.ll b/llvm/test/Bitcode/upgrade-global-ctors.ll
index b01c752..9ba422fe 100644
--- a/llvm/test/Bitcode/upgrade-global-ctors.ll
+++ b/llvm/test/Bitcode/upgrade-global-ctors.ll
@@ -1,4 +1,4 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
diff --git a/llvm/test/Bitcode/upgrade-loop-metadata.ll b/llvm/test/Bitcode/upgrade-loop-metadata.ll
index 3c1db98..806eda6 100644
--- a/llvm/test/Bitcode/upgrade-loop-metadata.ll
+++ b/llvm/test/Bitcode/upgrade-loop-metadata.ll
@@ -1,7 +1,7 @@
; Test to make sure loop vectorizer metadata is automatically upgraded.
;
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
define void @_Z28loop_with_vectorize_metadatav() {
entry:
diff --git a/llvm/test/Bitcode/upgrade-tbaa.ll b/llvm/test/Bitcode/upgrade-tbaa.ll
index 8dd3b69..4c7decf 100644
--- a/llvm/test/Bitcode/upgrade-tbaa.ll
+++ b/llvm/test/Bitcode/upgrade-tbaa.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
; Function Attrs: nounwind
define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {
diff --git a/llvm/test/Bitcode/use-list-order.ll b/llvm/test/Bitcode/use-list-order.ll
index 293650f..ccd9e96 100644
--- a/llvm/test/Bitcode/use-list-order.ll
+++ b/llvm/test/Bitcode/use-list-order.ll
@@ -1,4 +1,4 @@
-; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order
@a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1]
@b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2)
diff --git a/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll b/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
index 14914b7..ac7a941 100644
--- a/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
+++ b/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; vaArgIntrinsic.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread variable argument intrinsic instructions
diff --git a/llvm/test/Bitcode/vectorInstructions.3.2.ll b/llvm/test/Bitcode/vectorInstructions.3.2.ll
index 4daae41..6bd52b9 100644
--- a/llvm/test/Bitcode/vectorInstructions.3.2.ll
+++ b/llvm/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread vector operations of
diff --git a/llvm/test/Bitcode/visibility-styles.3.2.ll b/llvm/test/Bitcode/visibility-styles.3.2.ll
index aecbc65..00672cb 100644
--- a/llvm/test/Bitcode/visibility-styles.3.2.ll
+++ b/llvm/test/Bitcode/visibility-styles.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread visibility styles of
diff --git a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
index a09efc7..07006f7 100644
--- a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
+++ b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.