commit 86ef9ab28f1cb73b792b38a0613823450dbdfe4e
author Alexander Ivchenko <alexander.ivchenko@intel.com> Wed Mar 14 15:41:11 2018 +0000
committer Alexander Ivchenko <alexander.ivchenko@intel.com> Wed Mar 14 15:41:11 2018 +0000
tree a9d87b80e68a880ec9748a3ef3bc26af44ab99a2
parent 22af9c63f3915457d5eb2d40bb9e58d343e56953

[GlobalIsel][X86] Support for G_SDIV instruction

Reviewed By: igorb

Differential Revision: https://reviews.llvm.org/D44430

llvm-svn: 327520

llvm/lib/Target/X86/X86LegalizerInfo.cpp

diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
index 94dece2..c5e37d5 100644
--- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
@@ -131,8 +131,8 @@
         .widenScalarToNextPow2(0, /*Min*/ 8);
     getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s32, p0});
 
-    // Shifts
-    getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR})
+    // Shifts and SDIV
+    getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR, G_SDIV})
         .legalFor({s8, s16, s32})
         .clampScalar(0, s8, s32);
   }
@@ -214,8 +214,8 @@
   // Comparison
   setAction({G_ICMP, 1, s64}, Legal);
 
-  // Shifts
-  getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR})
+  // Shifts and SDIV
+  getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR, G_SDIV})
     .legalFor({s8, s16, s32, s64})
     .clampScalar(0, s8, s64);