Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
Note: I accidentally committed a bogus older version of this patch previously.
llvm-svn: 218787
diff --git a/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll b/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll
index 0440afc..b9a779d 100644
--- a/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll
+++ b/llvm/test/DebugInfo/X86/2010-04-13-PubType.ll
@@ -12,9 +12,9 @@
%retval = alloca i32 ; <i32*> [#uses=2]
%0 = alloca i32 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.X** %x_addr}, metadata !0), !dbg !13
+ call void @llvm.dbg.declare(metadata !{%struct.X** %x_addr}, metadata !0, metadata !{i32 786690}), !dbg !13
store %struct.X* %x, %struct.X** %x_addr
- call void @llvm.dbg.declare(metadata !{%struct.Y** %y_addr}, metadata !14), !dbg !13
+ call void @llvm.dbg.declare(metadata !{%struct.Y** %y_addr}, metadata !14, metadata !{i32 786690}), !dbg !13
store %struct.Y* %y, %struct.Y** %y_addr
store i32 0, i32* %0, align 4, !dbg !13
%1 = load i32* %0, align 4, !dbg !13 ; <i32> [#uses=1]
@@ -26,7 +26,7 @@
ret i32 %retval1, !dbg !15
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll b/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
index 4e8b3d3..5fc4a93 100644
--- a/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
+++ b/llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
@@ -7,14 +7,14 @@
define i32 @f() nounwind {
%LOC = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %LOC}, metadata !15), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %LOC}, metadata !15, metadata !{i32 786690}), !dbg !17
%1 = load i32* @GLB, align 4, !dbg !18
store i32 %1, i32* %LOC, align 4, !dbg !18
%2 = load i32* @GLB, align 4, !dbg !19
ret i32 %2, !dbg !19
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll b/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll
index 21dccd7..6368b86 100644
--- a/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll
+++ b/llvm/test/DebugInfo/X86/2011-12-16-BadStructRef.ll
@@ -15,24 +15,24 @@
%myBar = alloca %struct.bar, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !49), !dbg !50
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !49, metadata !{i32 786690}), !dbg !50
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !51), !dbg !52
- call void @llvm.dbg.declare(metadata !{%struct.bar* %myBar}, metadata !53), !dbg !55
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !51, metadata !{i32 786690}), !dbg !52
+ call void @llvm.dbg.declare(metadata !{%struct.bar* %myBar}, metadata !53, metadata !{i32 786690}), !dbg !55
call void @_ZN3barC1Ei(%struct.bar* %myBar, i32 1), !dbg !56
ret i32 0, !dbg !57
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN3barC1Ei(%struct.bar* %this, i32 %x) unnamed_addr uwtable ssp align 2 {
entry:
%this.addr = alloca %struct.bar*, align 8
%x.addr = alloca i32, align 4
store %struct.bar* %this, %struct.bar** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !58), !dbg !59
+ call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !58, metadata !{i32 786690}), !dbg !59
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !60), !dbg !61
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !60, metadata !{i32 786690}), !dbg !61
%this1 = load %struct.bar** %this.addr
%0 = load i32* %x.addr, align 4, !dbg !62
call void @_ZN3barC2Ei(%struct.bar* %this1, i32 %0), !dbg !62
@@ -44,9 +44,9 @@
%this.addr = alloca %struct.bar*, align 8
%x.addr = alloca i32, align 4
store %struct.bar* %this, %struct.bar** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !63), !dbg !64
+ call void @llvm.dbg.declare(metadata !{%struct.bar** %this.addr}, metadata !63, metadata !{i32 786690}), !dbg !64
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !65), !dbg !66
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !65, metadata !{i32 786690}), !dbg !66
%this1 = load %struct.bar** %this.addr
%b = getelementptr inbounds %struct.bar* %this1, i32 0, i32 0, !dbg !67
%0 = load i32* %x.addr, align 4, !dbg !67
@@ -62,9 +62,9 @@
%this.addr = alloca %struct.baz*, align 8
%a.addr = alloca i32, align 4
store %struct.baz* %this, %struct.baz** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !70), !dbg !71
+ call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !70, metadata !{i32 786690}), !dbg !71
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !72), !dbg !73
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !72, metadata !{i32 786690}), !dbg !73
%this1 = load %struct.baz** %this.addr
%0 = load i32* %a.addr, align 4, !dbg !74
call void @_ZN3bazC2Ei(%struct.baz* %this1, i32 %0), !dbg !74
@@ -76,9 +76,9 @@
%this.addr = alloca %struct.baz*, align 8
%a.addr = alloca i32, align 4
store %struct.baz* %this, %struct.baz** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !75), !dbg !76
+ call void @llvm.dbg.declare(metadata !{%struct.baz** %this.addr}, metadata !75, metadata !{i32 786690}), !dbg !76
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !77), !dbg !78
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !77, metadata !{i32 786690}), !dbg !78
%this1 = load %struct.baz** %this.addr
%h = getelementptr inbounds %struct.baz* %this1, i32 0, i32 0, !dbg !79
%0 = load i32* %a.addr, align 4, !dbg !79
diff --git a/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll b/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll
index 59921bd..2fbe56a 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_byte_size.ll
@@ -14,14 +14,14 @@
entry:
%a.addr = alloca %struct.A*, align 8
store %struct.A* %a, %struct.A** %a.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.A** %a.addr}, metadata !16), !dbg !17
+ call void @llvm.dbg.declare(metadata !{%struct.A** %a.addr}, metadata !16, metadata !{i32 786690}), !dbg !17
%0 = load %struct.A** %a.addr, align 8, !dbg !18
%b = getelementptr inbounds %struct.A* %0, i32 0, i32 0, !dbg !18
%1 = load i32* %b, align 4, !dbg !18
ret i32 %1, !dbg !18
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll b/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll
index dce234a..b90bdba 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_linkage_name.ll
@@ -38,20 +38,20 @@
entry:
%this.addr = alloca %struct.A*, align 8
store %struct.A* %this, %struct.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !26), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !26, metadata !{i32 786690}), !dbg !28
%this1 = load %struct.A** %this.addr
ret void, !dbg !29
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define void @_ZN1AD1Ev(%struct.A* %this) unnamed_addr #0 align 2 {
entry:
%this.addr = alloca %struct.A*, align 8
store %struct.A* %this, %struct.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !30), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%struct.A** %this.addr}, metadata !30, metadata !{i32 786690}), !dbg !31
%this1 = load %struct.A** %this.addr
call void @_ZN1AD2Ev(%struct.A* %this1), !dbg !32
ret void, !dbg !33
@@ -61,7 +61,7 @@
define void @_Z3foov() #2 {
entry:
%a = alloca %struct.A, align 1
- call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !34), !dbg !35
+ call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !34, metadata !{i32 786690}), !dbg !35
call void @_ZN1AC1Ei(%struct.A* %a, i32 1), !dbg !35
call void @_ZN1AD1Ev(%struct.A* %a), !dbg !36
ret void, !dbg !36
diff --git a/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll b/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
index abfbe70..02d878d 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
@@ -64,7 +64,7 @@
entry:
%call = tail call i32 @g(i32 0, i32 0) nounwind, !dbg !8
store i32 %call, i32* @a, align 4, !dbg !8
- tail call void @llvm.dbg.value(metadata !12, i64 0, metadata !5), !dbg !13
+ tail call void @llvm.dbg.value(metadata !12, i64 0, metadata !5, metadata !{i32 786690}), !dbg !13
br label %while.body
while.body: ; preds = %entry, %while.body
@@ -75,10 +75,10 @@
br i1 %tobool, label %while.end, label %while.body, !dbg !14
while.end: ; preds = %while.body
- tail call void @llvm.dbg.value(metadata !{i32 %mul}, i64 0, metadata !5), !dbg !14
+ tail call void @llvm.dbg.value(metadata !{i32 %mul}, i64 0, metadata !5, metadata !{i32 786690}), !dbg !14
%call4 = tail call i32 @g(i32 %mul, i32 0) nounwind, !dbg !15
store i32 %call4, i32* @a, align 4, !dbg !15
- tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !5), !dbg !17
+ tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !5, metadata !{i32 786690}), !dbg !17
br label %while.body9
while.body9: ; preds = %while.end, %while.body9
@@ -89,7 +89,7 @@
br i1 %tobool8, label %while.end13, label %while.body9, !dbg !18
while.end13: ; preds = %while.body9
- tail call void @llvm.dbg.value(metadata !{i32 %mul12}, i64 0, metadata !5), !dbg !18
+ tail call void @llvm.dbg.value(metadata !{i32 %mul12}, i64 0, metadata !5, metadata !{i32 786690}), !dbg !18
%call15 = tail call i32 @g(i32 0, i32 %mul12) nounwind, !dbg !19
store i32 %call15, i32* @a, align 4, !dbg !19
ret void, !dbg !20
@@ -97,7 +97,7 @@
declare i32 @g(i32, i32)
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!24}
diff --git a/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll b/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
index 4b9fae8..6bb155b 100644
--- a/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
+++ b/llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
@@ -17,21 +17,21 @@
%.addr = alloca i32, align 4
%a = alloca %class.A, align 4
store i32 %0, i32* %.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %.addr}, metadata !36), !dbg !35
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !21), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i32* %.addr}, metadata !36, metadata !{i32 786690}), !dbg !35
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !21, metadata !{i32 786690}), !dbg !23
call void @_ZN1AC1Ev(%class.A* %a), !dbg !24
%m_a = getelementptr inbounds %class.A* %a, i32 0, i32 0, !dbg !25
%1 = load i32* %m_a, align 4, !dbg !25
ret i32 %1, !dbg !25
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN1AC1Ev(%class.A* %this) unnamed_addr nounwind uwtable ssp align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !26), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !26, metadata !{i32 786690}), !dbg !28
%this1 = load %class.A** %this.addr
call void @_ZN1AC2Ev(%class.A* %this1), !dbg !29
ret void, !dbg !29
@@ -41,7 +41,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !30), !dbg !31
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !30, metadata !{i32 786690}), !dbg !31
%this1 = load %class.A** %this.addr
%m_a = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !32
store i32 0, i32* %m_a, align 4, !dbg !32
diff --git a/llvm/test/DebugInfo/X86/aligned_stack_var.ll b/llvm/test/DebugInfo/X86/aligned_stack_var.ll
index 54484ac..f3d92b6 100644
--- a/llvm/test/DebugInfo/X86/aligned_stack_var.ll
+++ b/llvm/test/DebugInfo/X86/aligned_stack_var.ll
@@ -18,11 +18,11 @@
define void @_Z3runv() nounwind uwtable {
entry:
%x = alloca i32, align 32
- call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !9), !dbg !12
+ call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !9, metadata !{i32 786690}), !dbg !12
ret void, !dbg !13
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!15}
diff --git a/llvm/test/DebugInfo/X86/arguments.ll b/llvm/test/DebugInfo/X86/arguments.ll
index 2f17251..e75481b 100644
--- a/llvm/test/DebugInfo/X86/arguments.ll
+++ b/llvm/test/DebugInfo/X86/arguments.ll
@@ -31,8 +31,8 @@
; Function Attrs: nounwind uwtable
define void @_Z4func3fooS_(%struct.foo* %f, %struct.foo* %g) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%struct.foo* %f}, metadata !19), !dbg !20
- call void @llvm.dbg.declare(metadata !{%struct.foo* %g}, metadata !21), !dbg !20
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %f}, metadata !19, metadata !{i32 786690}), !dbg !20
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %g}, metadata !21, metadata !{i32 786690}), !dbg !20
%i = getelementptr inbounds %struct.foo* %f, i32 0, i32 0, !dbg !22
%0 = load i32* %i, align 4, !dbg !22
%inc = add nsw i32 %0, 1, !dbg !22
@@ -41,7 +41,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/array.ll b/llvm/test/DebugInfo/X86/array.ll
index dc6c7a4..de0794c 100644
--- a/llvm/test/DebugInfo/X86/array.ll
+++ b/llvm/test/DebugInfo/X86/array.ll
@@ -25,7 +25,7 @@
; Function Attrs: nounwind ssp uwtable
define void @f(i32* nocapture %p) #0 {
- tail call void @llvm.dbg.value(metadata !{i32* %p}, i64 0, metadata !11), !dbg !28
+ tail call void @llvm.dbg.value(metadata !{i32* %p}, i64 0, metadata !11, metadata !{i32 786690}), !dbg !28
store i32 42, i32* %p, align 4, !dbg !29, !tbaa !30
ret void, !dbg !34
}
@@ -33,15 +33,15 @@
; Function Attrs: nounwind ssp uwtable
define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 {
%array = alloca [4 x i32], align 16
- tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !19), !dbg !35
- tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !20), !dbg !35
- tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !19, metadata !{i32 786690}), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !20, metadata !{i32 786690}), !dbg !35
+ tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21, metadata !{i32 786690}), !dbg !36
%1 = bitcast [4 x i32]* %array to i8*, !dbg !36
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ([4 x i32]* @main.array to i8*), i64 16, i32 16, i1 false), !dbg !36
- tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21, metadata !{i32 786690}), !dbg !36
%2 = getelementptr inbounds [4 x i32]* %array, i64 0, i64 0, !dbg !37
call void @f(i32* %2), !dbg !37
- tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{[4 x i32]* %array}, i64 0, metadata !21, metadata !{i32 786690}), !dbg !36
%3 = load i32* %2, align 16, !dbg !38, !tbaa !30
ret i32 %3, !dbg !38
}
@@ -50,7 +50,7 @@
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/X86/array2.ll b/llvm/test/DebugInfo/X86/array2.ll
index 2dc2af32..823426e 100644
--- a/llvm/test/DebugInfo/X86/array2.ll
+++ b/llvm/test/DebugInfo/X86/array2.ll
@@ -29,7 +29,7 @@
entry:
%p.addr = alloca i32*, align 8
store i32* %p, i32** %p.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32** %p.addr}, metadata !19), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32** %p.addr}, metadata !19, metadata !{i32 786690}), !dbg !20
%0 = load i32** %p.addr, align 8, !dbg !21
%arrayidx = getelementptr inbounds i32* %0, i64 0, !dbg !21
store i32 42, i32* %arrayidx, align 4, !dbg !21
@@ -37,7 +37,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind ssp uwtable
define i32 @main(i32 %argc, i8** %argv) #0 {
@@ -48,10 +48,10 @@
%array = alloca [4 x i32], align 16
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !23), !dbg !24
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !23, metadata !{i32 786690}), !dbg !24
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !25), !dbg !24
- call void @llvm.dbg.declare(metadata !{[4 x i32]* %array}, metadata !26), !dbg !30
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !25, metadata !{i32 786690}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{[4 x i32]* %array}, metadata !26, metadata !{i32 786690}), !dbg !30
%0 = bitcast [4 x i32]* %array to i8*, !dbg !30
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([4 x i32]* @main.array to i8*), i64 16, i32 16, i1 false), !dbg !30
%arraydecay = getelementptr inbounds [4 x i32]* %array, i32 0, i32 0, !dbg !31
diff --git a/llvm/test/DebugInfo/X86/block-capture.ll b/llvm/test/DebugInfo/X86/block-capture.ll
index 95613c7..161b468 100644
--- a/llvm/test/DebugInfo/X86/block-capture.ll
+++ b/llvm/test/DebugInfo/X86/block-capture.ll
@@ -17,15 +17,15 @@
%struct.__block_descriptor = type { i64, i64 }
%struct.__block_literal_generic = type { i8*, i32, i32, i8*, %struct.__block_descriptor* }
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define hidden void @__foo_block_invoke_0(i8* %.block_descriptor) uwtable ssp {
entry:
%exn.slot = alloca i8*
%ehselector.slot = alloca i32
- call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !39), !dbg !51
+ call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !39, metadata !{i32 786690}), !dbg !51
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>*, !dbg !52
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>* %block}, metadata !53), !dbg !54
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>* %block}, metadata !53, metadata !65), !dbg !54
%block.capture.addr = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void ()* }>* %block, i32 0, i32 5, !dbg !55
%0 = load void ()** %block.capture.addr, align 8, !dbg !55
%block.literal = bitcast void ()* %0 to %struct.__block_literal_generic*, !dbg !55
@@ -58,7 +58,7 @@
br label %eh.cont, !dbg !58
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
declare i8* @objc_begin_catch(i8*)
@@ -118,7 +118,7 @@
!50 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"block", i32 7, i64 64, i64 64, i64 256, i32 0, metadata !9} ; [ DW_TAG_member ]
!51 = metadata !{i32 7, i32 18, metadata !28, null}
!52 = metadata !{i32 7, i32 19, metadata !28, null}
-!53 = metadata !{i32 786688, metadata !28, metadata !"block", metadata !6, i32 5, metadata !9, i32 0, i32 0, metadata !65} ; [ DW_TAG_auto_variable ]
+!53 = metadata !{i32 786688, metadata !28, metadata !"block", metadata !6, i32 5, metadata !9, i32 0, i32 0} ;; [ DW_TAG_auto_variable ]
!54 = metadata !{i32 5, i32 27, metadata !28, null}
!55 = metadata !{i32 8, i32 22, metadata !56, null}
!56 = metadata !{i32 786443, metadata !6, metadata !57, i32 7, i32 26, i32 2} ; [ DW_TAG_lexical_block ]
@@ -130,4 +130,4 @@
!62 = metadata !{i32 9, i32 20, metadata !56, null}
!63 = metadata !{metadata !"foo.m", metadata !"/Users/echristo"}
!64 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!65 = metadata !{i64 1, i64 32}
+!65 = metadata !{i32 786690, i64 34, i64 32} ; [DW_OP_plus 32]
diff --git a/llvm/test/DebugInfo/X86/byvalstruct.ll b/llvm/test/DebugInfo/X86/byvalstruct.ll
index d787ef3..e65f9b6 100644
--- a/llvm/test/DebugInfo/X86/byvalstruct.ll
+++ b/llvm/test/DebugInfo/X86/byvalstruct.ll
@@ -66,20 +66,20 @@
%otherBitmap.addr = alloca %0*, align 8
%length.addr = alloca i64, align 8
store %0* %self, %0** %self.addr, align 8
- call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !28), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !28, metadata !{i32 786690}), !dbg !29
store i8* %_cmd, i8** %_cmd.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !30), !dbg !29
+ call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !30, metadata !{i32 786690}), !dbg !29
store %0* %otherBitmap, %0** %otherBitmap.addr, align 8
- call void @llvm.dbg.declare(metadata !{%0** %otherBitmap.addr}, metadata !32), !dbg !29
- call void @llvm.dbg.declare(metadata !{%struct.ImageInfo* %info}, metadata !33), !dbg !34
+ call void @llvm.dbg.declare(metadata !{%0** %otherBitmap.addr}, metadata !32, metadata !{i32 786690}), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%struct.ImageInfo* %info}, metadata !33, metadata !{i32 786690}), !dbg !34
store i64 %length, i64* %length.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64* %length.addr}, metadata !35), !dbg !36
+ call void @llvm.dbg.declare(metadata !{i64* %length.addr}, metadata !35, metadata !{i32 786690}), !dbg !36
%0 = load i8** %retval, !dbg !37
ret i8* %0, !dbg !37
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/cu-ranges-odr.ll b/llvm/test/DebugInfo/X86/cu-ranges-odr.ll
index c42a908..71d60f2 100644
--- a/llvm/test/DebugInfo/X86/cu-ranges-odr.ll
+++ b/llvm/test/DebugInfo/X86/cu-ranges-odr.ll
@@ -35,9 +35,9 @@
%this.addr = alloca %class.A*, align 8
%i.addr = alloca i32, align 4
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !27), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !27, metadata !{i32 786690}), !dbg !29
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !30), !dbg !31
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !30, metadata !{i32 786690}), !dbg !31
%this1 = load %class.A** %this.addr
%a = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !31
%0 = load i32* %i.addr, align 4, !dbg !31
@@ -46,7 +46,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define internal void @_GLOBAL__I_a() section ".text.startup" {
entry:
diff --git a/llvm/test/DebugInfo/X86/cu-ranges.ll b/llvm/test/DebugInfo/X86/cu-ranges.ll
index 2ff4eb1..a164e9e 100644
--- a/llvm/test/DebugInfo/X86/cu-ranges.ll
+++ b/llvm/test/DebugInfo/X86/cu-ranges.ll
@@ -29,21 +29,21 @@
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !13), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !13, metadata !{i32 786690}), !dbg !14
%0 = load i32* %a.addr, align 4, !dbg !14
%add = add nsw i32 %0, 1, !dbg !14
ret i32 %add, !dbg !14
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @bar(i32 %b) #0 {
entry:
%b.addr = alloca i32, align 4
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !15), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !15, metadata !{i32 786690}), !dbg !16
%0 = load i32* %b.addr, align 4, !dbg !16
%add = add nsw i32 %0, 2, !dbg !16
ret i32 %add, !dbg !16
diff --git a/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll b/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll
index c658b50..650a2ad 100644
--- a/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll
+++ b/llvm/test/DebugInfo/X86/dbg-byval-parameter.ll
@@ -9,7 +9,7 @@
%retval = alloca double ; <double*> [#uses=2]
%0 = alloca double ; <double*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0), !dbg !15
+ call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0, metadata !{i32 786690}), !dbg !15
%1 = getelementptr inbounds %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1]
%2 = getelementptr inbounds %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1]
%3 = load double* %2, align 8, !dbg !16 ; <double> [#uses=1]
@@ -23,7 +23,7 @@
ret double %retval1, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!21}
diff --git a/llvm/test/DebugInfo/X86/dbg-const-int.ll b/llvm/test/DebugInfo/X86/dbg-const-int.ll
index bf7ee08..184371b 100644
--- a/llvm/test/DebugInfo/X86/dbg-const-int.ll
+++ b/llvm/test/DebugInfo/X86/dbg-const-int.ll
@@ -12,11 +12,11 @@
define i32 @foo() nounwind uwtable readnone optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6), !dbg !9
+ tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6, metadata !{i32 786690}), !dbg !9
ret i32 42, !dbg !10
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!15}
diff --git a/llvm/test/DebugInfo/X86/dbg-const.ll b/llvm/test/DebugInfo/X86/dbg-const.ll
index 72c74f1..b8827c8 100644
--- a/llvm/test/DebugInfo/X86/dbg-const.ll
+++ b/llvm/test/DebugInfo/X86/dbg-const.ll
@@ -17,15 +17,15 @@
;CHECK-NEXT: .byte 42
define i32 @foobar() nounwind readonly noinline ssp {
entry:
- tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6), !dbg !9
+ tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6, metadata !{i32 786690}), !dbg !9
%call = tail call i32 @bar(), !dbg !11
- tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !6), !dbg !11
+ tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !6, metadata !{i32 786690}), !dbg !11
%call2 = tail call i32 @bar(), !dbg !11
%add = add nsw i32 %call2, %call, !dbg !12
ret i32 %add, !dbg !10
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
declare i32 @bar() nounwind readnone
!llvm.dbg.cu = !{!2}
diff --git a/llvm/test/DebugInfo/X86/dbg-declare-arg.ll b/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
index 0bab207..57df5a4 100644
--- a/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
+++ b/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
@@ -14,8 +14,8 @@
%nrvo = alloca i1
%cleanup.dest.slot = alloca i32
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !26), !dbg !27
- call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !28), !dbg !30
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !26, metadata !{i32 786690}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !28, metadata !{i32 786690}), !dbg !30
store i32 0, i32* %j, align 4, !dbg !31
%tmp = load i32* %i.addr, align 4, !dbg !32
%cmp = icmp eq i32 %tmp, 42, !dbg !32
@@ -29,7 +29,7 @@
if.end: ; preds = %if.then, %entry
store i1 false, i1* %nrvo, !dbg !36
- call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !37), !dbg !39
+ call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !37, metadata !{i32 786690}), !dbg !39
%tmp2 = load i32* %j, align 4, !dbg !40
%x = getelementptr inbounds %class.A* %agg.result, i32 0, i32 0, !dbg !40
store i32 %tmp2, i32* %x, align 4, !dbg !40
@@ -46,13 +46,13 @@
ret void, !dbg !42
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN1AD1Ev(%class.A* %this) unnamed_addr ssp align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !43), !dbg !44
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !43, metadata !{i32 786690}), !dbg !44
%this1 = load %class.A** %this.addr
call void @_ZN1AD2Ev(%class.A* %this1)
ret void, !dbg !45
@@ -62,7 +62,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !46), !dbg !47
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !46, metadata !{i32 786690}), !dbg !47
%this1 = load %class.A** %this.addr
%x = getelementptr inbounds %class.A* %this1, i32 0, i32 0, !dbg !48
store i32 1, i32* %x, align 4, !dbg !48
diff --git a/llvm/test/DebugInfo/X86/dbg-declare.ll b/llvm/test/DebugInfo/X86/dbg-declare.ll
index 241a5a1..1ccf4cd 100644
--- a/llvm/test/DebugInfo/X86/dbg-declare.ll
+++ b/llvm/test/DebugInfo/X86/dbg-declare.ll
@@ -7,21 +7,21 @@
%saved_stack = alloca i8*
%cleanup.dest.slot = alloca i32
store i32* %x, i32** %x.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32** %x.addr}, metadata !14), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32** %x.addr}, metadata !14, metadata !{i32 786690}), !dbg !15
%0 = load i32** %x.addr, align 8, !dbg !16
%1 = load i32* %0, align 4, !dbg !16
%2 = zext i32 %1 to i64, !dbg !16
%3 = call i8* @llvm.stacksave(), !dbg !16
store i8* %3, i8** %saved_stack, !dbg !16
%vla = alloca i8, i64 %2, align 16, !dbg !16
- call void @llvm.dbg.declare(metadata !{i8* %vla}, metadata !18), !dbg !23
+ call void @llvm.dbg.declare(metadata !{i8* %vla}, metadata !18, metadata !{i32 786690}), !dbg !23
store i32 1, i32* %cleanup.dest.slot
%4 = load i8** %saved_stack, !dbg !24
call void @llvm.stackrestore(i8* %4), !dbg !24
ret i32 0, !dbg !25
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare i8* @llvm.stacksave() nounwind
diff --git a/llvm/test/DebugInfo/X86/dbg-i128-const.ll b/llvm/test/DebugInfo/X86/dbg-i128-const.ll
index 01b105f..457db6a 100644
--- a/llvm/test/DebugInfo/X86/dbg-i128-const.ll
+++ b/llvm/test/DebugInfo/X86/dbg-i128-const.ll
@@ -5,12 +5,12 @@
define i128 @__foo(i128 %a, i128 %b) nounwind {
entry:
- tail call void @llvm.dbg.value(metadata !0, i64 0, metadata !1), !dbg !11
+ tail call void @llvm.dbg.value(metadata !0, i64 0, metadata !1, metadata !{i32 786690}), !dbg !11
%add = add i128 %a, %b, !dbg !11
ret i128 %add, !dbg !11
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!5}
!llvm.module.flags = !{!16}
diff --git a/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll b/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
index 016d0a1..1ee62e0 100644
--- a/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
+++ b/llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
@@ -14,8 +14,8 @@
define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone {
entry:
- tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14), !dbg !15
- tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !15
+ tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17, metadata !{i32 786690}), !dbg !21
br i1 undef, label %bb2, label %bb4, !dbg !22
bb2: ; preds = %entry
@@ -31,9 +31,9 @@
ret i128 undef, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
diff --git a/llvm/test/DebugInfo/X86/dbg-prolog-end.ll b/llvm/test/DebugInfo/X86/dbg-prolog-end.ll
index a7c6cb5..cacf1e8 100644
--- a/llvm/test/DebugInfo/X86/dbg-prolog-end.ll
+++ b/llvm/test/DebugInfo/X86/dbg-prolog-end.ll
@@ -8,8 +8,8 @@
%i.addr = alloca i32, align 4
%j = alloca i32, align 4
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !7), !dbg !8
- call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !9), !dbg !11
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !7, metadata !{i32 786690}), !dbg !8
+ call void @llvm.dbg.declare(metadata !{i32* %j}, metadata !9, metadata !{i32 786690}), !dbg !11
store i32 2, i32* %j, align 4, !dbg !12
%tmp = load i32* %j, align 4, !dbg !13
%inc = add nsw i32 %tmp, 1, !dbg !13
@@ -22,7 +22,7 @@
ret i32 %tmp3, !dbg !15
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define i32 @main() nounwind ssp {
entry:
diff --git a/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll b/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
index 23fa352..fdabe24 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
@@ -50,13 +50,13 @@
define i32 @foo() #0 {
entry:
%i = alloca i32, align 4
- call void @llvm.dbg.value(metadata !14, i64 0, metadata !10), !dbg !15
+ call void @llvm.dbg.value(metadata !14, i64 0, metadata !10, metadata !{i32 786690}), !dbg !15
%call = call i32 @f3(i32 3) #3, !dbg !16
- call void @llvm.dbg.value(metadata !17, i64 0, metadata !10), !dbg !18
+ call void @llvm.dbg.value(metadata !17, i64 0, metadata !10, metadata !{i32 786690}), !dbg !18
%call1 = call i32 (...)* @f1() #3, !dbg !19
- call void @llvm.dbg.value(metadata !{i32 %call1}, i64 0, metadata !10), !dbg !19
+ call void @llvm.dbg.value(metadata !{i32 %call1}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !19
store i32 %call1, i32* %i, align 4, !dbg !19, !tbaa !20
- call void @llvm.dbg.value(metadata !{i32* %i}, i64 0, metadata !10), !dbg !24
+ call void @llvm.dbg.value(metadata !{i32* %i}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !24
call void @f2(i32* %i) #3, !dbg !24
ret i32 0, !dbg !25
}
@@ -68,7 +68,7 @@
declare void @f2(i32*)
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
attributes #0 = { nounwind ssp uwtable }
attributes #2 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll b/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
index cdf3220..579d597 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
@@ -4,21 +4,19 @@
; PR 9817
-declare <4 x i32> @__amdil_get_global_id_int()
-declare void @llvm.dbg.value(metadata , i64 , metadata )
+declare <4 x i32> @__amdil_get_global_id_int()
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
define void @__OpenCL_test_kernel(i32 addrspace(1)* %ip) nounwind {
entry:
- call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata
-!7), !dbg !8
+ call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !7, metadata !{i32 786690}), !dbg !8
%0 = call <4 x i32> @__amdil_get_global_id_int() nounwind
%1 = extractelement <4 x i32> %0, i32 0
- call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !9), !dbg !11
- call void @llvm.dbg.value(metadata !12, i64 0, metadata !13), !dbg !14
+ call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !9, metadata !{i32 786690}), !dbg !11
+ call void @llvm.dbg.value(metadata !12, i64 0, metadata !13, metadata !{i32 786690}), !dbg !14
%tmp2 = load i32 addrspace(1)* %ip, align 4, !dbg !15
%tmp3 = add i32 0, %tmp2, !dbg !15
; CHECK: ##DEBUG_VALUE: idx <- E{{..$}}
- call void @llvm.dbg.value(metadata !{i32 %tmp3}, i64 0, metadata !13), !dbg
-!15
+ call void @llvm.dbg.value(metadata !{i32 %tmp3}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !15
%arrayidx = getelementptr i32 addrspace(1)* %ip, i32 %1, !dbg !16
store i32 %tmp3, i32 addrspace(1)* %arrayidx, align 4, !dbg !16
ret void, !dbg !17
diff --git a/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll b/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
index aa37cda..921a599 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
@@ -45,8 +45,8 @@
define i32 @foo(%struct.S1* nocapture %sp, i32 %nums) nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9), !dbg !20
- tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9, metadata !{i32 786690}), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !21
%tmp2 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 1, !dbg !22
store i32 %nums, i32* %tmp2, align 4, !dbg !22
%call = tail call float* @bar(i32 %nums) nounwind optsize, !dbg !27
@@ -61,15 +61,15 @@
define void @foobar() nounwind optsize ssp {
entry:
- tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9) nounwind, !dbg !31
- tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18) nounwind, !dbg !35
+ tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9, metadata !{i32 786690}) nounwind, !dbg !31
+ tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18, metadata !{i32 786690}) nounwind, !dbg !35
store i32 1, i32* getelementptr inbounds (%struct.S1* @p, i64 0, i32 1), align 8, !dbg !36
%call.i = tail call float* @bar(i32 1) nounwind optsize, !dbg !37
store float* %call.i, float** getelementptr inbounds (%struct.S1* @p, i64 0, i32 0), align 8, !dbg !37
ret void, !dbg !38
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!43}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-isel.ll b/llvm/test/DebugInfo/X86/dbg-value-isel.ll
index 9544c62..c079f00 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-isel.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-isel.ll
@@ -13,7 +13,7 @@
define void @__OpenCL_nbt02_kernel(i32 addrspace(1)* %ip) nounwind {
entry:
- call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !8), !dbg !9
+ call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !8, metadata !{i32 786690}), !dbg !9
%0 = call <4 x i32> @__amdil_get_local_id_int() nounwind
%1 = extractelement <4 x i32> %0, i32 0
br label %2
@@ -28,7 +28,7 @@
get_local_id.exit: ; preds = %4
%6 = phi i32 [ %5, %4 ]
- call void @llvm.dbg.value(metadata !{i32 %6}, i64 0, metadata !10), !dbg !12
+ call void @llvm.dbg.value(metadata !{i32 %6}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !12
%7 = call <4 x i32> @__amdil_get_global_id_int() nounwind, !dbg !12
%8 = extractelement <4 x i32> %7, i32 0, !dbg !12
br label %9
@@ -43,7 +43,7 @@
get_global_id.exit: ; preds = %11
%13 = phi i32 [ %12, %11 ]
- call void @llvm.dbg.value(metadata !{i32 %13}, i64 0, metadata !13), !dbg !14
+ call void @llvm.dbg.value(metadata !{i32 %13}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !14
%14 = call <4 x i32> @__amdil_get_local_size_int() nounwind
%15 = extractelement <4 x i32> %14, i32 0
br label %16
@@ -58,7 +58,7 @@
get_local_size.exit: ; preds = %18
%20 = phi i32 [ %19, %18 ]
- call void @llvm.dbg.value(metadata !{i32 %20}, i64 0, metadata !15), !dbg !16
+ call void @llvm.dbg.value(metadata !{i32 %20}, i64 0, metadata !15, metadata !{i32 786690}), !dbg !16
%tmp5 = add i32 %6, %13, !dbg !17
%tmp7 = add i32 %tmp5, %20, !dbg !17
store i32 %tmp7, i32 addrspace(1)* %ip, align 4, !dbg !17
@@ -68,7 +68,7 @@
ret void, !dbg !18
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare <4 x i32> @__amdil_get_local_size_int() nounwind
@@ -76,7 +76,7 @@
declare <4 x i32> @__amdil_get_global_id_int() nounwind
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-location.ll b/llvm/test/DebugInfo/X86/dbg-value-location.ll
index 55d1ae6..ced7885 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-location.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-location.ll
@@ -14,11 +14,11 @@
@dfm = external global i32, align 4
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define i32 @foo(i32 %dev, i64 %cmd, i8* %data, i32 %data2) nounwind optsize ssp {
entry:
- call void @llvm.dbg.value(metadata !{i32 %dev}, i64 0, metadata !12), !dbg !13
+ call void @llvm.dbg.value(metadata !{i32 %dev}, i64 0, metadata !12, metadata !{i32 786690}), !dbg !13
%tmp.i = load i32* @dfm, align 4, !dbg !14
%cmp.i = icmp eq i32 %tmp.i, 0, !dbg !14
br i1 %cmp.i, label %if.else, label %if.end.i, !dbg !14
@@ -45,7 +45,7 @@
declare hidden fastcc i32 @bar(i32, i32* nocapture) nounwind optsize ssp
declare hidden fastcc i32 @bar2(i32) nounwind optsize ssp
declare hidden fastcc i32 @bar3(i32) nounwind optsize ssp
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!29}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-range.ll b/llvm/test/DebugInfo/X86/dbg-value-range.ll
index caeec0a..4d5fb6c 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-range.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-range.ll
@@ -4,10 +4,10 @@
define i32 @bar(%struct.a* nocapture %b) nounwind ssp {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6), !dbg !13
+ tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6, metadata !{i32 786690}), !dbg !13
%tmp1 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !14
%tmp2 = load i32* %tmp1, align 4, !dbg !14
- tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11), !dbg !14
+ tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11, metadata !{i32 786690}), !dbg !14
%call = tail call i32 (...)* @foo(i32 %tmp2) nounwind , !dbg !18
%add = add nsw i32 %tmp2, 1, !dbg !19
ret i32 %add, !dbg !19
@@ -15,7 +15,7 @@
declare i32 @foo(...)
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!24}
diff --git a/llvm/test/DebugInfo/X86/dbg-value-terminator.ll b/llvm/test/DebugInfo/X86/dbg-value-terminator.ll
index ee8bd0f..c4000bf 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-terminator.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-terminator.ll
@@ -87,7 +87,7 @@
"44.i": ; preds = %"42.i"
%2 = load %a** undef, align 8, !dbg !12
%3 = bitcast %a* %2 to %a*, !dbg !12
- call void @llvm.dbg.value(metadata !{%a* %3}, i64 0, metadata !6), !dbg !12
+ call void @llvm.dbg.value(metadata !{%a* %3}, i64 0, metadata !6, metadata !{i32 786690}), !dbg !12
br label %may_unswitch_on.exit, !dbg !12
"45.i": ; preds = %"38.i"
@@ -108,7 +108,7 @@
attributes #0 = { nounwind readnone }
attributes #1 = { nounwind uwtable }
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!22}
diff --git a/llvm/test/DebugInfo/X86/dbg_value_direct.ll b/llvm/test/DebugInfo/X86/dbg_value_direct.ll
index 0ab48df..bc8b5be 100644
--- a/llvm/test/DebugInfo/X86/dbg_value_direct.ll
+++ b/llvm/test/DebugInfo/X86/dbg_value_direct.ll
@@ -53,7 +53,7 @@
%19 = inttoptr i64 %18 to i8*
%20 = load i8* %19
%21 = icmp ne i8 %20, 0
- call void @llvm.dbg.declare(metadata !{i32* %3}, metadata !23)
+ call void @llvm.dbg.declare(metadata !{i32* %3}, metadata !23, metadata !28)
br i1 %21, label %22, label %28
; <label>:22 ; preds = %entry
@@ -70,7 +70,7 @@
; <label>:28 ; preds = %22, %entry
store i32 %0, i32* %3, align 4
- call void @llvm.dbg.declare(metadata !{%struct.A* %agg.result}, metadata !24), !dbg !25
+ call void @llvm.dbg.declare(metadata !{%struct.A* %agg.result}, metadata !24, metadata !{i32 786690}), !dbg !25
call void @_ZN1AC1Ev(%struct.A* %agg.result), !dbg !25
store i64 1172321806, i64* %4, !dbg !26
%29 = inttoptr i64 %10 to i32*, !dbg !26
@@ -85,7 +85,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare void @_ZN1AC1Ev(%struct.A*) #2
@@ -170,9 +170,9 @@
!20 = metadata !{i32 786468}
!21 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
!22 = metadata !{i32 2, metadata !"Dwarf Version", i32 3}
-!23 = metadata !{i32 786689, metadata !4, metadata !"", metadata !5, i32 16777222, metadata !21, i32 0, i32 0, metadata !28} ; [ DW_TAG_arg_variable ] [line 6]
+!23 = metadata !{i32 786689, metadata !4, metadata !"", metadata !5, i32 16777222, metadata !21, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [line 6]
!24 = metadata !{i32 786688, metadata !4, metadata !"a", metadata !5, i32 7, metadata !8, i32 8192, i32 0} ; [ DW_TAG_auto_variable ] [a] [line 7]
!25 = metadata !{i32 7, i32 0, metadata !4, null}
!26 = metadata !{i32 8, i32 0, metadata !4, null} ; [ DW_TAG_imported_declaration ]
!27 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!28 = metadata !{i64 2}
+!28 = metadata !{i32 786690, i64 6} ; [DW_OP_deref]
diff --git a/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll b/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
index 95eda60..9587a6d 100644
--- a/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
+++ b/llvm/test/DebugInfo/X86/debug-info-block-captured-self.ll
@@ -63,18 +63,18 @@
; ModuleID = 'llvm/tools/clang/test/CodeGenObjC/debug-info-block-captured-self.m'
%0 = type opaque
%struct.__block_descriptor = type { i64, i64 }
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define internal void @"__24-[Main initWithContext:]_block_invoke"(i8* %.block_descriptor, i8* %obj) #0 {
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !84
%block.captured-self = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block, i32 0, i32 5, !dbg !84
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !86), !dbg !87
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !86, metadata !110), !dbg !87
ret void, !dbg !87
}
define internal void @"__24-[Main initWithContext:]_block_invoke_2"(i8* %.block_descriptor, i8* %object) #0 {
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !103
%block.captured-self = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block, i32 0, i32 5, !dbg !103
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !105), !dbg !106
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %block}, metadata !105, metadata !109), !dbg !106
ret void, !dbg !106
}
@@ -101,12 +101,12 @@
!41 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ]
!42 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"", i32 35, metadata !39, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*, i8*)* @"__24-[Main initWithContext:]_block_invoke_2", null, null, metadata !15, i32 35} ; [ DW_TAG_subprogram ] [line 35] [local] [def] [__24-[Main initWithContext:]_block_invoke_2]
!84 = metadata !{i32 33, i32 0, metadata !38, null}
-!86 = metadata !{i32 786688, metadata !38, metadata !"self", metadata !1, i32 41, metadata !34, i32 0, i32 0, metadata !110} ; [ DW_TAG_auto_variable ] [self] [line 41]
+!86 = metadata !{i32 786688, metadata !38, metadata !"self", metadata !1, i32 41, metadata !34, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [self] [line 41]
!87 = metadata !{i32 41, i32 0, metadata !38, null}
!103 = metadata !{i32 35, i32 0, metadata !42, null}
-!105 = metadata !{i32 786688, metadata !42, metadata !"self", metadata !1, i32 40, metadata !34, i32 0, i32 0, metadata !109} ; [ DW_TAG_auto_variable ] [self] [line 40]
+!105 = metadata !{i32 786688, metadata !42, metadata !"self", metadata !1, i32 40, metadata !34, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [self] [line 40]
!106 = metadata !{i32 40, i32 0, metadata !42, null}
!107 = metadata !{metadata !"llvm/tools/clang/test/CodeGenObjC/debug-info-block-captured-self.m", metadata !""}
!108 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!109 = metadata !{i64 1, i64 32}
-!110 = metadata !{i64 1, i64 32}
+!109 = metadata !{i32 786690, i64 34, i64 32} ; [DW_OP_plus 32]
+!110 = metadata !{i32 786690, i64 34, i64 32} ; [DW_OP_plus 32]
diff --git a/llvm/test/DebugInfo/X86/debug-info-blocks.ll b/llvm/test/DebugInfo/X86/debug-info-blocks.ll
index 8f4784d..9ad4a2a 100644
--- a/llvm/test/DebugInfo/X86/debug-info-blocks.ll
+++ b/llvm/test/DebugInfo/X86/debug-info-blocks.ll
@@ -101,9 +101,9 @@
%3 = alloca %struct._objc_super
%4 = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>, align 8
store %0* %self, %0** %1, align 8
- call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !60), !dbg !62
+ call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !60, metadata !{i32 786690}), !dbg !62
store i8* %_cmd, i8** %2, align 8
- call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !63), !dbg !62
+ call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !63, metadata !{i32 786690}), !dbg !62
%5 = load %0** %1, !dbg !65
%6 = bitcast %0* %5 to i8*, !dbg !65
%7 = getelementptr inbounds %struct._objc_super* %3, i32 0, i32 0, !dbg !65
@@ -143,14 +143,14 @@
ret i8* %26, !dbg !71
}
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare i8* @objc_msgSendSuper2(%struct._objc_super*, i8*, ...)
define internal void @run(void ()* %block) #0 {
%1 = alloca void ()*, align 8
store void ()* %block, void ()** %1, align 8
- call void @llvm.dbg.declare(metadata !{void ()** %1}, metadata !72), !dbg !73
+ call void @llvm.dbg.declare(metadata !{void ()** %1}, metadata !72, metadata !{i32 786690}), !dbg !73
%2 = load void ()** %1, align 8, !dbg !74
%3 = bitcast void ()* %2 to %struct.__block_literal_generic*, !dbg !74
%4 = getelementptr inbounds %struct.__block_literal_generic* %3, i32 0, i32 3, !dbg !74
@@ -167,13 +167,13 @@
%d = alloca %1*, align 8
store i8* %.block_descriptor, i8** %1, align 8
%3 = load i8** %1
- call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !76), !dbg !88
- call void @llvm.dbg.declare(metadata !{i8* %.block_descriptor}, metadata !76), !dbg !88
+ call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !76, metadata !{i32 786690}), !dbg !88
+ call void @llvm.dbg.declare(metadata !{i8* %.block_descriptor}, metadata !76, metadata !{i32 786690}), !dbg !88
%4 = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !88
store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2, align 8, !dbg !88
%5 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !88
- call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2}, metadata !89), !dbg !90
- call void @llvm.dbg.declare(metadata !{%1** %d}, metadata !91), !dbg !100
+ call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2}, metadata !89, metadata !111), !dbg !90
+ call void @llvm.dbg.declare(metadata !{%1** %d}, metadata !91, metadata !{i32 786690}), !dbg !100
%6 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_", !dbg !100
%7 = bitcast %struct._class_t* %6 to i8*, !dbg !100
%8 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to %struct._message_ref_t*), i32 0, i32 0), !dbg !100
@@ -200,7 +200,7 @@
ret void, !dbg !90
}
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
declare i8* @objc_msgSend_fixup(i8*, %struct._message_ref_t*, ...)
@@ -210,9 +210,9 @@
%3 = alloca i8*, align 8
%4 = alloca i8*, align 8
store i8* %0, i8** %3, align 8
- call void @llvm.dbg.declare(metadata !{i8** %3}, metadata !102), !dbg !103
+ call void @llvm.dbg.declare(metadata !{i8** %3}, metadata !102, metadata !{i32 786690}), !dbg !103
store i8* %1, i8** %4, align 8
- call void @llvm.dbg.declare(metadata !{i8** %4}, metadata !104), !dbg !103
+ call void @llvm.dbg.declare(metadata !{i8** %4}, metadata !104, metadata !{i32 786690}), !dbg !103
%5 = load i8** %4, !dbg !103
%6 = bitcast i8* %5 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !103
%7 = load i8** %3, !dbg !103
@@ -231,7 +231,7 @@
define internal void @__destroy_helper_block_(i8*) {
%2 = alloca i8*, align 8
store i8* %0, i8** %2, align 8
- call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !105), !dbg !106
+ call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !105, metadata !{i32 786690}), !dbg !106
%3 = load i8** %2, !dbg !106
%4 = bitcast i8* %3 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !106
%5 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !106
@@ -247,7 +247,7 @@
%1 = alloca i32, align 4
%a = alloca %0*, align 8
store i32 0, i32* %1
- call void @llvm.dbg.declare(metadata !{%0** %a}, metadata !107), !dbg !108
+ call void @llvm.dbg.declare(metadata !{%0** %a}, metadata !107, metadata !{i32 786690}), !dbg !108
%2 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_5", !dbg !108
%3 = bitcast %struct._class_t* %2 to i8*, !dbg !108
%4 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to %struct._message_ref_t*), i32 0, i32 0), !dbg !108
@@ -359,7 +359,7 @@
!86 = metadata !{i32 786451, metadata !1, null, metadata !"__block_descriptor_withcopydispose", i32 49, i64 0, i64 0, i32 0, i32 4, null, null, i32 0, null, null, null} ; [ DW_TAG_structure_type ] [__block_descriptor_withcopydispose] [line 49, size 0, align 0, offset 0] [decl] [from ]
!87 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"self", i32 49, i64 64, i64 64, i64 256, i32 0, metadata !61} ; [ DW_TAG_member ] [self] [line 49, size 64, align 64, offset 256] [from ]
!88 = metadata !{i32 49, i32 0, metadata !27, null}
-!89 = metadata !{i32 786688, metadata !27, metadata !"self", metadata !32, i32 52, metadata !23, i32 0, i32 0, metadata !111} ; [ DW_TAG_auto_variable ] [self] [line 52]
+!89 = metadata !{i32 786688, metadata !27, metadata !"self", metadata !32, i32 52, metadata !23, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [self] [line 52]
!90 = metadata !{i32 52, i32 0, metadata !27, null}
!91 = metadata !{i32 786688, metadata !92, metadata !"d", metadata !6, i32 50, metadata !93, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [d] [line 50]
!92 = metadata !{i32 786443, metadata !5, metadata !27, i32 49, i32 0, i32 2} ; [ DW_TAG_lexical_block ] [llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m]
@@ -381,4 +381,4 @@
!108 = metadata !{i32 61, i32 0, metadata !36, null}
!109 = metadata !{i32 62, i32 0, metadata !36, null}
!110 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!111 = metadata !{i64 2, i64 1, i64 32}
+!111 = metadata !{i32 786690, i64 6, i64 34, i64 32} ; [DW_OP_deref DW_OP_plus 32]
diff --git a/llvm/test/DebugInfo/X86/debug-info-static-member.ll b/llvm/test/DebugInfo/X86/debug-info-static-member.ll
index cd0197f..f069157 100644
--- a/llvm/test/DebugInfo/X86/debug-info-static-member.ll
+++ b/llvm/test/DebugInfo/X86/debug-info-static-member.ll
@@ -47,14 +47,14 @@
%retval = alloca i32, align 4
%instance_C = alloca %class.C, align 4
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{%class.C* %instance_C}, metadata !29), !dbg !30
+ call void @llvm.dbg.declare(metadata !{%class.C* %instance_C}, metadata !29, metadata !{i32 786690}), !dbg !30
%d = getelementptr inbounds %class.C* %instance_C, i32 0, i32 0, !dbg !31
store i32 8, i32* %d, align 4, !dbg !31
%0 = load i32* @_ZN1C1cE, align 4, !dbg !32
ret i32 %0, !dbg !32
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!34}
diff --git a/llvm/test/DebugInfo/X86/debug-loc-asan.ll b/llvm/test/DebugInfo/X86/debug-loc-asan.ll
index b1980ec..620646c 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-asan.ll
+++ b/llvm/test/DebugInfo/X86/debug-loc-asan.ll
@@ -81,7 +81,7 @@
%21 = inttoptr i64 %20 to i8*
%22 = load i8* %21
%23 = icmp ne i8 %22, 0
- call void @llvm.dbg.declare(metadata !{i32* %8}, metadata !12)
+ call void @llvm.dbg.declare(metadata !{i32* %8}, metadata !12, metadata !14)
br i1 %23, label %24, label %30
; <label>:24 ; preds = %5
@@ -147,7 +147,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define internal void @asan.module_ctor() {
call void @__asan_init_v3()
@@ -181,6 +181,6 @@
!9 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}
!10 = metadata !{i32 2, metadata !"Debug Info Version", i32 1}
!11 = metadata !{metadata !"clang version 3.5.0 (209308)"}
-!12 = metadata !{i32 786689, metadata !4, metadata !"y", metadata !5, i32 16777217, metadata !8, i32 0, i32 0, metadata !14} ; [ DW_TAG_arg_variable ] [y] [line 1]
+!12 = metadata !{i32 786689, metadata !4, metadata !"y", metadata !5, i32 16777217, metadata !8, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [y] [line 1]
!13 = metadata !{i32 2, i32 0, metadata !4, null}
-!14 = metadata !{i64 2}
+!14 = metadata !{i32 786690, i64 6} ; [DW_OP_deref]
diff --git a/llvm/test/DebugInfo/X86/debug-loc-offset.ll b/llvm/test/DebugInfo/X86/debug-loc-offset.ll
index 7866d0e..ba87fd8 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-offset.ll
+++ b/llvm/test/DebugInfo/X86/debug-loc-offset.ll
@@ -64,20 +64,20 @@
entry:
%b.addr = alloca i32, align 4
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !21), !dbg !22
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !21, metadata !{i32 786690}), !dbg !22
%0 = load i32* %b.addr, align 4, !dbg !23
%add = add nsw i32 %0, 4, !dbg !23
ret i32 %add, !dbg !23
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define void @_Z3baz1A(%struct.A* %a) #2 {
entry:
%z = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !24), !dbg !25
- call void @llvm.dbg.declare(metadata !{i32* %z}, metadata !26), !dbg !27
+ call void @llvm.dbg.declare(metadata !{%struct.A* %a}, metadata !24, metadata !{i32 786690}), !dbg !25
+ call void @llvm.dbg.declare(metadata !{i32* %z}, metadata !26, metadata !{i32 786690}), !dbg !27
store i32 2, i32* %z, align 4, !dbg !27
%var = getelementptr inbounds %struct.A* %a, i32 0, i32 1, !dbg !28
%0 = load i32* %var, align 4, !dbg !28
diff --git a/llvm/test/DebugInfo/X86/debug-ranges-offset.ll b/llvm/test/DebugInfo/X86/debug-ranges-offset.ll
index 365ba17..fd83556 100644
--- a/llvm/test/DebugInfo/X86/debug-ranges-offset.ll
+++ b/llvm/test/DebugInfo/X86/debug-ranges-offset.ll
@@ -31,11 +31,11 @@
%call = call i8* @_Znwm(i64 4) #4, !dbg !19
%_msret = load i64* getelementptr inbounds ([8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !19
%3 = bitcast i8* %call to i32*, !dbg !19
- tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !9), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !9, metadata !{i32 786690}), !dbg !19
%4 = inttoptr i64 %1 to i64*, !dbg !19
store i64 %_msret, i64* %4, align 8, !dbg !19
store volatile i32* %3, i32** %p, align 8, !dbg !19
- tail call void @llvm.dbg.value(metadata !{i32** %p}, i64 0, metadata !9), !dbg !19
+ tail call void @llvm.dbg.value(metadata !{i32** %p}, i64 0, metadata !9, metadata !{i32 786690}), !dbg !19
%p.0.p.0. = load volatile i32** %p, align 8, !dbg !20
%_msld = load i64* %4, align 8, !dbg !20
%_mscmp = icmp eq i64 %_msld, 0, !dbg !20
@@ -96,11 +96,11 @@
%call.i = call i8* @_Znwm(i64 4) #4, !dbg !30
%_msret = load i64* getelementptr inbounds ([8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !30
%3 = bitcast i8* %call.i to i32*, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !32), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32* %3}, i64 0, metadata !32, metadata !{i32 786690}), !dbg !30
%4 = inttoptr i64 %1 to i64*, !dbg !30
store i64 %_msret, i64* %4, align 8, !dbg !30
store volatile i32* %3, i32** %p.i, align 8, !dbg !30
- tail call void @llvm.dbg.value(metadata !{i32** %p.i}, i64 0, metadata !32), !dbg !30
+ tail call void @llvm.dbg.value(metadata !{i32** %p.i}, i64 0, metadata !32, metadata !{i32 786690}), !dbg !30
%p.i.0.p.0.p.0..i = load volatile i32** %p.i, align 8, !dbg !33
%_msld = load i64* %4, align 8, !dbg !33
%_mscmp = icmp eq i64 %_msld, 0, !dbg !33
@@ -148,7 +148,7 @@
declare void @__msan_init()
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
; Function Attrs: nounwind
declare i32 @puts(i8* nocapture readonly) #3
diff --git a/llvm/test/DebugInfo/X86/decl-derived-member.ll b/llvm/test/DebugInfo/X86/decl-derived-member.ll
index 4035602..cc0b628 100644
--- a/llvm/test/DebugInfo/X86/decl-derived-member.ll
+++ b/llvm/test/DebugInfo/X86/decl-derived-member.ll
@@ -37,7 +37,7 @@
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !36), !dbg !38
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !36, metadata !{i32 786690}), !dbg !38
%this1 = load %struct.foo** %this.addr
%b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !39
call void @_ZN4baseC2Ev(%struct.base* %b) #2, !dbg !39
@@ -49,7 +49,7 @@
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !40), !dbg !41
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !40, metadata !{i32 786690}), !dbg !41
%this1 = load %struct.foo** %this.addr
%b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !42
call void @_ZN4baseD1Ev(%struct.base* %b), !dbg !42
@@ -60,7 +60,7 @@
declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #3
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #3
declare void @_ZN4baseD1Ev(%struct.base*) #4
@@ -69,7 +69,7 @@
entry:
%this.addr = alloca %struct.base*, align 8
store %struct.base* %this, %struct.base** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.base** %this.addr}, metadata !45), !dbg !47
+ call void @llvm.dbg.declare(metadata !{%struct.base** %this.addr}, metadata !45, metadata !{i32 786690}), !dbg !47
%this1 = load %struct.base** %this.addr
%0 = bitcast %struct.base* %this1 to i8***, !dbg !48
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV4base, i64 0, i64 2), i8*** %0, !dbg !48
diff --git a/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll b/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
index 5a9f444..dd949ed 100644
--- a/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
+++ b/llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
@@ -28,14 +28,14 @@
; Function Attrs: nounwind readnone uwtable
define i32 @_Z3fooi(i32 %bar) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %bar}, i64 0, metadata !10), !dbg !20
+ tail call void @llvm.dbg.value(metadata !{i32 %bar}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !20
ret i32 %bar, !dbg !20
}
; Function Attrs: nounwind readnone uwtable
define i32 @_Z4foo2i(i32 %bar2) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{i32 %bar2}, i64 0, metadata !13), !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i32 %bar2}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !21
ret i32 %bar2, !dbg !21
}
@@ -51,7 +51,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/X86/dwarf-public-names.ll b/llvm/test/DebugInfo/X86/dwarf-public-names.ll
index 793971a..cec681c 100644
--- a/llvm/test/DebugInfo/X86/dwarf-public-names.ll
+++ b/llvm/test/DebugInfo/X86/dwarf-public-names.ll
@@ -62,13 +62,13 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !28), !dbg !30
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !28, metadata !{i32 786690}), !dbg !30
%this1 = load %struct.C** %this.addr
store i32 0, i32* @_ZN1C22static_member_variableE, align 4, !dbg !31
ret void, !dbg !32
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define i32 @_ZN1C22static_member_functionEv() nounwind uwtable align 2 {
entry:
diff --git a/llvm/test/DebugInfo/X86/earlydup-crash.ll b/llvm/test/DebugInfo/X86/earlydup-crash.ll
index b5dc01e..a84ad1b 100644
--- a/llvm/test/DebugInfo/X86/earlydup-crash.ll
+++ b/llvm/test/DebugInfo/X86/earlydup-crash.ll
@@ -4,7 +4,7 @@
%struct.cpp_dir = type { %struct.cpp_dir*, i8*, i32, i8, i8**, i8*, i8* (i8*, %struct.cpp_dir*)*, i64, i32, i8 }
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
define internal i8* @framework_construct_pathname(i8* %fname, %struct.cpp_dir* %dir) nounwind ssp {
entry:
@@ -13,7 +13,7 @@
bb: ; preds = %entry
%tmp = icmp eq i32 undef, 0
%tmp1 = add i32 0, 11
- call void @llvm.dbg.value(metadata !{i32 %tmp1}, i64 0, metadata !0)
+ call void @llvm.dbg.value(metadata !{i32 %tmp1}, i64 0, metadata !0, metadata !{i32 786690})
br i1 undef, label %bb18, label %bb31.preheader
bb31.preheader: ; preds = %bb19, %bb
diff --git a/llvm/test/DebugInfo/X86/elf-names.ll b/llvm/test/DebugInfo/X86/elf-names.ll
index 36fd232..c763bcb 100644
--- a/llvm/test/DebugInfo/X86/elf-names.ll
+++ b/llvm/test/DebugInfo/X86/elf-names.ll
@@ -22,7 +22,7 @@
define void @_ZN1DC2Ev(%class.D* nocapture %this) unnamed_addr nounwind uwtable align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !29), !dbg !36
+ tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !29, metadata !{i32 786690}), !dbg !36
%c1 = getelementptr inbounds %class.D* %this, i64 0, i32 0, !dbg !37
store i32 1, i32* %c1, align 4, !dbg !37
%c2 = getelementptr inbounds %class.D* %this, i64 0, i32 1, !dbg !42
@@ -36,8 +36,8 @@
define void @_ZN1DC2ERKS_(%class.D* nocapture %this, %class.D* nocapture %d) unnamed_addr nounwind uwtable align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !34), !dbg !46
- tail call void @llvm.dbg.value(metadata !{%class.D* %d}, i64 0, metadata !35), !dbg !46
+ tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !34, metadata !{i32 786690}), !dbg !46
+ tail call void @llvm.dbg.value(metadata !{%class.D* %d}, i64 0, metadata !35, metadata !{i32 786690}), !dbg !46
%c1 = getelementptr inbounds %class.D* %d, i64 0, i32 0, !dbg !47
%0 = load i32* %c1, align 4, !dbg !47
%c12 = getelementptr inbounds %class.D* %this, i64 0, i32 0, !dbg !47
@@ -57,7 +57,7 @@
ret void, !dbg !52
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!54}
diff --git a/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll b/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
index 48379ab..41e5d67 100644
--- a/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
+++ b/llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
@@ -9,8 +9,8 @@
entry:
%my_foo = alloca %struct.foo, align 4
%my_bar = alloca %struct.bar, align 4
- call void @llvm.dbg.declare(metadata !{%struct.foo* %my_foo}, metadata !10), !dbg !19
- call void @llvm.dbg.declare(metadata !{%struct.bar* %my_bar}, metadata !20), !dbg !28
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %my_foo}, metadata !10, metadata !{i32 786690}), !dbg !19
+ call void @llvm.dbg.declare(metadata !{%struct.bar* %my_bar}, metadata !20, metadata !{i32 786690}), !dbg !28
%a = getelementptr inbounds %struct.foo* %my_foo, i32 0, i32 0, !dbg !29
store i32 3, i32* %a, align 4, !dbg !29
%a1 = getelementptr inbounds %struct.bar* %my_bar, i32 0, i32 0, !dbg !30
@@ -23,7 +23,7 @@
ret i32 %add, !dbg !31
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
; CHECK: DW_TAG_base_type
; CHECK-NEXT: DW_AT_name [DW_FORM_strp] ( .debug_str[{{.*}}] = "int")
diff --git a/llvm/test/DebugInfo/X86/ending-run.ll b/llvm/test/DebugInfo/X86/ending-run.ll
index 165074e..f249833 100644
--- a/llvm/test/DebugInfo/X86/ending-run.ll
+++ b/llvm/test/DebugInfo/X86/ending-run.ll
@@ -13,8 +13,8 @@
%x.addr = alloca i32, align 4
%y = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !12), !dbg !13
- call void @llvm.dbg.declare(metadata !{i32* %y}, metadata !14), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !12, metadata !{i32 786690}), !dbg !13
+ call void @llvm.dbg.declare(metadata !{i32* %y}, metadata !14, metadata !{i32 786690}), !dbg !16
%0 = load i32* %x.addr, align 4, !dbg !17
%1 = load i32* %x.addr, align 4, !dbg !17
%mul = mul nsw i32 %0, %1, !dbg !17
@@ -24,7 +24,7 @@
ret i32 %sub, !dbg !18
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20}
diff --git a/llvm/test/DebugInfo/X86/fission-ranges.ll b/llvm/test/DebugInfo/X86/fission-ranges.ll
index 482ed8f..59e8994 100644
--- a/llvm/test/DebugInfo/X86/fission-ranges.ll
+++ b/llvm/test/DebugInfo/X86/fission-ranges.ll
@@ -91,8 +91,8 @@
; Function Attrs: nounwind uwtable
define internal fastcc void @foo() #0 {
entry:
- tail call void @llvm.dbg.value(metadata !29, i64 0, metadata !13), !dbg !30
- tail call void @llvm.dbg.value(metadata !44, i64 0, metadata !14), !dbg !31
+ tail call void @llvm.dbg.value(metadata !29, i64 0, metadata !13, metadata !{i32 786690}), !dbg !30
+ tail call void @llvm.dbg.value(metadata !44, i64 0, metadata !14, metadata !{i32 786690}), !dbg !31
%c.promoted9 = load i32* @c, align 4, !dbg !32, !tbaa !33
br label %for.cond1.preheader, !dbg !31
@@ -114,28 +114,28 @@
for.body9: ; preds = %for.body9, %for.cond7.preheader
%and2 = phi i32 [ %and.lcssa5, %for.cond7.preheader ], [ %and, %for.body9 ], !dbg !40
%e.01 = phi i32 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
- tail call void @llvm.dbg.value(metadata !41, i64 0, metadata !19), !dbg !40
+ tail call void @llvm.dbg.value(metadata !41, i64 0, metadata !19, metadata !{i32 786690}), !dbg !40
%and = and i32 %and2, 1, !dbg !32
%inc = add i32 %e.01, 1, !dbg !39
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !18), !dbg !39
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !39
%exitcond = icmp eq i32 %inc, 30, !dbg !39
br i1 %exitcond, label %for.inc10, label %for.body9, !dbg !39
for.inc10: ; preds = %for.body9
%inc11 = add nsw i32 %b.03, 1, !dbg !38
- tail call void @llvm.dbg.value(metadata !{i32 %inc11}, i64 0, metadata !15), !dbg !38
+ tail call void @llvm.dbg.value(metadata !{i32 %inc11}, i64 0, metadata !15, metadata !{i32 786690}), !dbg !38
%exitcond11 = icmp eq i32 %inc11, 30, !dbg !38
br i1 %exitcond11, label %for.inc13, label %for.cond7.preheader, !dbg !38
for.inc13: ; preds = %for.inc10
%inc14 = add i32 %d.06, 1, !dbg !37
- tail call void @llvm.dbg.value(metadata !{i32 %inc14}, i64 0, metadata !16), !dbg !37
+ tail call void @llvm.dbg.value(metadata !{i32 %inc14}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !37
%exitcond12 = icmp eq i32 %inc14, 30, !dbg !37
br i1 %exitcond12, label %for.inc16, label %for.cond4.preheader, !dbg !37
for.inc16: ; preds = %for.inc13
%inc17 = add nsw i32 %a.08, 1, !dbg !31
- tail call void @llvm.dbg.value(metadata !{i32 %inc17}, i64 0, metadata !14), !dbg !31
+ tail call void @llvm.dbg.value(metadata !{i32 %inc17}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !31
%exitcond13 = icmp eq i32 %inc17, 30, !dbg !31
br i1 %exitcond13, label %for.end18, label %for.cond1.preheader, !dbg !31
@@ -145,7 +145,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/formal_parameter.ll b/llvm/test/DebugInfo/X86/formal_parameter.ll
index 2fdab7a..b204017 100644
--- a/llvm/test/DebugInfo/X86/formal_parameter.ll
+++ b/llvm/test/DebugInfo/X86/formal_parameter.ll
@@ -28,7 +28,7 @@
entry:
%map.addr = alloca i32, align 4
store i32 %map, i32* %map.addr, align 4, !tbaa !15
- call void @llvm.dbg.declare(metadata !{i32* %map.addr}, metadata !10), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %map.addr}, metadata !10, metadata !{i32 786690}), !dbg !14
%call = call i32 (i32*, ...)* bitcast (i32 (...)* @lookup to i32 (i32*, ...)*)(i32* %map.addr) #3, !dbg !19
; Ensure that all dbg intrinsics have the same scope after
; LowerDbgDeclare is finished with them.
@@ -42,14 +42,14 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare i32 @lookup(...)
declare i32 @verify(...)
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/generate-odr-hash.ll b/llvm/test/DebugInfo/X86/generate-odr-hash.ll
index 5f58741..af96dbd 100644
--- a/llvm/test/DebugInfo/X86/generate-odr-hash.ll
+++ b/llvm/test/DebugInfo/X86/generate-odr-hash.ll
@@ -182,12 +182,12 @@
define void @_Z3foov() #0 {
entry:
%b = alloca %struct.baz, align 1
- call void @llvm.dbg.declare(metadata !{%struct.baz* %b}, metadata !46), !dbg !48
+ call void @llvm.dbg.declare(metadata !{%struct.baz* %b}, metadata !46, metadata !{i32 786690}), !dbg !48
ret void, !dbg !49
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define internal void @__cxx_global_var_init() section ".text.startup" {
entry:
@@ -200,7 +200,7 @@
entry:
%this.addr = alloca %"struct.<anonymous namespace>::walrus"*, align 8
store %"struct.<anonymous namespace>::walrus"* %this, %"struct.<anonymous namespace>::walrus"** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%"struct.<anonymous namespace>::walrus"** %this.addr}, metadata !51), !dbg !53
+ call void @llvm.dbg.declare(metadata !{%"struct.<anonymous namespace>::walrus"** %this.addr}, metadata !51, metadata !{i32 786690}), !dbg !53
%this1 = load %"struct.<anonymous namespace>::walrus"** %this.addr
ret void, !dbg !54
}
diff --git a/llvm/test/DebugInfo/X86/gnu-public-names.ll b/llvm/test/DebugInfo/X86/gnu-public-names.ll
index 96fa52b..9679f22 100644
--- a/llvm/test/DebugInfo/X86/gnu-public-names.ll
+++ b/llvm/test/DebugInfo/X86/gnu-public-names.ll
@@ -223,14 +223,14 @@
entry:
%this.addr = alloca %struct.C*, align 8
store %struct.C* %this, %struct.C** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !50), !dbg !52
+ call void @llvm.dbg.declare(metadata !{%struct.C** %this.addr}, metadata !50, metadata !{i32 786690}), !dbg !52
%this1 = load %struct.C** %this.addr
store i32 0, i32* @_ZN1C22static_member_variableE, align 4, !dbg !53
ret void, !dbg !54
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind uwtable
define i32 @_ZN1C22static_member_functionEv() #0 align 2 {
diff --git a/llvm/test/DebugInfo/X86/inline-member-function.ll b/llvm/test/DebugInfo/X86/inline-member-function.ll
index 3dc6043..1903af2 100644
--- a/llvm/test/DebugInfo/X86/inline-member-function.ll
+++ b/llvm/test/DebugInfo/X86/inline-member-function.ll
@@ -45,9 +45,9 @@
store i32 0, i32* %retval
%0 = load i32* @i, align 4, !dbg !23
store %struct.foo* %tmp, %struct.foo** %this.addr.i, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr.i}, metadata !24), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr.i}, metadata !24, metadata !{i32 786690}), !dbg !26
store i32 %0, i32* %x.addr.i, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr.i}, metadata !27), !dbg !28
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr.i}, metadata !27, metadata !{i32 786690}), !dbg !28
%this1.i = load %struct.foo** %this.addr.i
%1 = load i32* %x.addr.i, align 4, !dbg !28
%add.i = add nsw i32 %1, 2, !dbg !28
@@ -55,7 +55,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/inline-seldag-test.ll b/llvm/test/DebugInfo/X86/inline-seldag-test.ll
index 615f03a..4fc93dc 100644
--- a/llvm/test/DebugInfo/X86/inline-seldag-test.ll
+++ b/llvm/test/DebugInfo/X86/inline-seldag-test.ll
@@ -31,10 +31,10 @@
entry:
%y.addr.i = alloca i32, align 4
%x = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !15), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %x}, metadata !15, metadata !{i32 786690}), !dbg !17
%0 = load volatile i32* %x, align 4, !dbg !18
store i32 %0, i32* %y.addr.i, align 4
- call void @llvm.dbg.declare(metadata !{i32* %y.addr.i}, metadata !19), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %y.addr.i}, metadata !19, metadata !{i32 786690}), !dbg !20
%1 = load i32* %y.addr.i, align 4, !dbg !21
%tobool.i = icmp ne i32 %1, 0, !dbg !21
%cond.i = select i1 %tobool.i, i32 4, i32 7, !dbg !21
@@ -43,7 +43,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll b/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
index 2fd7ee3..12fd9d5 100644
--- a/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
+++ b/llvm/test/DebugInfo/X86/instcombine-instrinsics.ll
@@ -30,7 +30,7 @@
; Function Attrs: nounwind ssp uwtable
define void @init() #0 {
%p = alloca %struct.i14*, align 8
- call void @llvm.dbg.declare(metadata !{%struct.i14** %p}, metadata !11), !dbg !18
+ call void @llvm.dbg.declare(metadata !{%struct.i14** %p}, metadata !11, metadata !{i32 786690}), !dbg !18
store %struct.i14* null, %struct.i14** %p, align 8, !dbg !18
%1 = call i32 @foo(%struct.i14** %p), !dbg !19
%2 = load %struct.i14** %p, align 8, !dbg !20
@@ -43,7 +43,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare i32 @foo(%struct.i14**)
diff --git a/llvm/test/DebugInfo/X86/lexical_block.ll b/llvm/test/DebugInfo/X86/lexical_block.ll
index 6c9f9ad..a9c4076 100644
--- a/llvm/test/DebugInfo/X86/lexical_block.ll
+++ b/llvm/test/DebugInfo/X86/lexical_block.ll
@@ -25,7 +25,7 @@
define void @_Z1bv() #0 {
entry:
%i = alloca i32, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !11), !dbg !14
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !11, metadata !{i32 786690}), !dbg !14
store i32 3, i32* %i, align 4, !dbg !14
%0 = load i32* %i, align 4, !dbg !14
%tobool = icmp ne i32 %0, 0, !dbg !14
@@ -39,7 +39,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/line-info.ll b/llvm/test/DebugInfo/X86/line-info.ll
index 619ea3c..e197b5c 100644
--- a/llvm/test/DebugInfo/X86/line-info.ll
+++ b/llvm/test/DebugInfo/X86/line-info.ll
@@ -18,14 +18,14 @@
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !14), !dbg !15
+ call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !14, metadata !{i32 786690}), !dbg !15
%0 = load i32* %x.addr, align 4, !dbg !16
%inc = add nsw i32 %0, 1, !dbg !16
store i32 %inc, i32* %x.addr, align 4, !dbg !16
ret i32 %inc, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define i32 @main() #0 {
entry:
diff --git a/llvm/test/DebugInfo/X86/linkage-name.ll b/llvm/test/DebugInfo/X86/linkage-name.ll
index 2b1647b..0eedc1d 100644
--- a/llvm/test/DebugInfo/X86/linkage-name.ll
+++ b/llvm/test/DebugInfo/X86/linkage-name.ll
@@ -14,15 +14,15 @@
%this.addr = alloca %class.A*, align 8
%b.addr = alloca i32, align 4
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !21), !dbg !23
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !21, metadata !{i32 786690}), !dbg !23
store i32 %b, i32* %b.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !24), !dbg !25
+ call void @llvm.dbg.declare(metadata !{i32* %b.addr}, metadata !24, metadata !{i32 786690}), !dbg !25
%this1 = load %class.A** %this.addr
%0 = load i32* %b.addr, align 4, !dbg !26
ret i32 %0, !dbg !26
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!29}
diff --git a/llvm/test/DebugInfo/X86/misched-dbg-value.ll b/llvm/test/DebugInfo/X86/misched-dbg-value.ll
index b0e166f..4a338e0 100644
--- a/llvm/test/DebugInfo/X86/misched-dbg-value.ll
+++ b/llvm/test/DebugInfo/X86/misched-dbg-value.ll
@@ -48,12 +48,12 @@
define void @Proc8(i32* nocapture %Array1Par, [51 x i32]* nocapture %Array2Par, i32 %IntParI1, i32 %IntParI2) nounwind optsize {
entry:
- tail call void @llvm.dbg.value(metadata !{i32* %Array1Par}, i64 0, metadata !23), !dbg !64
- tail call void @llvm.dbg.value(metadata !{[51 x i32]* %Array2Par}, i64 0, metadata !24), !dbg !65
- tail call void @llvm.dbg.value(metadata !{i32 %IntParI1}, i64 0, metadata !25), !dbg !66
- tail call void @llvm.dbg.value(metadata !{i32 %IntParI2}, i64 0, metadata !26), !dbg !67
+ tail call void @llvm.dbg.value(metadata !{i32* %Array1Par}, i64 0, metadata !23, metadata !{i32 786690}), !dbg !64
+ tail call void @llvm.dbg.value(metadata !{[51 x i32]* %Array2Par}, i64 0, metadata !24, metadata !{i32 786690}), !dbg !65
+ tail call void @llvm.dbg.value(metadata !{i32 %IntParI1}, i64 0, metadata !25, metadata !{i32 786690}), !dbg !66
+ tail call void @llvm.dbg.value(metadata !{i32 %IntParI2}, i64 0, metadata !26, metadata !{i32 786690}), !dbg !67
%add = add i32 %IntParI1, 5, !dbg !68
- tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !27), !dbg !68
+ tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !27, metadata !{i32 786690}), !dbg !68
%idxprom = sext i32 %add to i64, !dbg !69
%arrayidx = getelementptr inbounds i32* %Array1Par, i64 %idxprom, !dbg !69
store i32 %IntParI2, i32* %arrayidx, align 4, !dbg !69
@@ -65,7 +65,7 @@
%idxprom7 = sext i32 %add6 to i64, !dbg !74
%arrayidx8 = getelementptr inbounds i32* %Array1Par, i64 %idxprom7, !dbg !74
store i32 %add, i32* %arrayidx8, align 4, !dbg !74
- tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !28), !dbg !75
+ tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !28, metadata !{i32 786690}), !dbg !75
br label %for.body, !dbg !75
for.body: ; preds = %entry, %for.body
@@ -74,7 +74,7 @@
%arrayidx13 = getelementptr inbounds [51 x i32]* %Array2Par, i64 %idxprom, i64 %indvars.iv, !dbg !77
store i32 %add, i32* %arrayidx13, align 4, !dbg !77
%inc = add nsw i32 %IntIndex.046, 1, !dbg !75
- tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !28), !dbg !75
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !28, metadata !{i32 786690}), !dbg !75
%cmp = icmp sgt i32 %inc, %add3, !dbg !75
%indvars.iv.next = add i64 %indvars.iv, 1, !dbg !75
br i1 %cmp, label %for.end, label %for.body, !dbg !75
@@ -95,7 +95,7 @@
ret void, !dbg !81
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
attributes #0 = { nounwind optsize ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/multiple-at-const-val.ll b/llvm/test/DebugInfo/X86/multiple-at-const-val.ll
index 27a5510..e17aa76 100644
--- a/llvm/test/DebugInfo/X86/multiple-at-const-val.ll
+++ b/llvm/test/DebugInfo/X86/multiple-at-const-val.ll
@@ -27,7 +27,7 @@
declare %"class.std::basic_ostream"* @test(%"class.std::basic_ostream"*, i8*, i64)
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!1803}
diff --git a/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll b/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
index 4e84528..0579caa 100644
--- a/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
+++ b/llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
@@ -58,8 +58,8 @@
for.body: ; preds = %for.body, %entry
%iter.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
call void @llvm.lifetime.start(i64 4, i8* %0), !dbg !26
- call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !16) #3, !dbg !26
- call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !27) #3, !dbg !29
+ call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !16, metadata !{i32 786690}) #3, !dbg !26
+ call void @llvm.dbg.value(metadata !{%struct.string* %str2.i}, i64 0, metadata !27, metadata !{i32 786690}) #3, !dbg !29
call void @_Z4sinkPKv(i8* undef) #3, !dbg !29
call void @_Z4sinkPKv(i8* %0) #3, !dbg !30
call void @llvm.lifetime.end(i64 4, i8* %0), !dbg !31
@@ -80,7 +80,7 @@
declare void @_Z4sinkPKv(i8*) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
; Function Attrs: nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #3
diff --git a/llvm/test/DebugInfo/X86/objc-property-void.ll b/llvm/test/DebugInfo/X86/objc-property-void.ll
index d366a7a..fd927f6 100644
--- a/llvm/test/DebugInfo/X86/objc-property-void.ll
+++ b/llvm/test/DebugInfo/X86/objc-property-void.ll
@@ -56,14 +56,14 @@
%self.addr = alloca %0*, align 8
%_cmd.addr = alloca i8*, align 8
store %0* %self, %0** %self.addr, align 8
- call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !24), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%0** %self.addr}, metadata !24, metadata !{i32 786690}), !dbg !26
store i8* %_cmd, i8** %_cmd.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !27), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i8** %_cmd.addr}, metadata !27, metadata !{i32 786690}), !dbg !26
ret void, !dbg !29
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/op_deref.ll b/llvm/test/DebugInfo/X86/op_deref.ll
index db82a77..d06700b 100644
--- a/llvm/test/DebugInfo/X86/op_deref.ll
+++ b/llvm/test/DebugInfo/X86/op_deref.ll
@@ -29,14 +29,14 @@
%saved_stack = alloca i8*
%i = alloca i32, align 4
store i32 %s, i32* %s.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %s.addr}, metadata !10), !dbg !11
+ call void @llvm.dbg.declare(metadata !{i32* %s.addr}, metadata !10, metadata !{i32 786690}), !dbg !11
%0 = load i32* %s.addr, align 4, !dbg !12
%1 = zext i32 %0 to i64, !dbg !12
%2 = call i8* @llvm.stacksave(), !dbg !12
store i8* %2, i8** %saved_stack, !dbg !12
%vla = alloca i32, i64 %1, align 16, !dbg !12
- call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !14), !dbg !18
- call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !19), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !14, metadata !30), !dbg !18
+ call void @llvm.dbg.declare(metadata !{i32* %i}, metadata !19, metadata !{i32 786690}), !dbg !20
store i32 0, i32* %i, align 4, !dbg !21
br label %for.cond, !dbg !21
@@ -68,7 +68,7 @@
ret void, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare i8* @llvm.stacksave() nounwind
@@ -89,7 +89,7 @@
!11 = metadata !{i32 1, i32 26, metadata !5, null}
!12 = metadata !{i32 3, i32 13, metadata !13, null}
!13 = metadata !{i32 786443, metadata !28, metadata !5, i32 2, i32 1, i32 0} ; [ DW_TAG_lexical_block ]
-!14 = metadata !{i32 786688, metadata !13, metadata !"vla", metadata !6, i32 3, metadata !15, i32 8192, i32 0, metadata !30} ; [ DW_TAG_auto_variable ]
+!14 = metadata !{i32 786688, metadata !13, metadata !"vla", metadata !6, i32 3, metadata !15, i32 8192, i32 0} ;; [ DW_TAG_auto_variable ]
!15 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !9, metadata !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
!16 = metadata !{metadata !17}
!17 = metadata !{i32 786465, i64 0, i64 -1} ; [ DW_TAG_subrange_type ]
@@ -105,4 +105,4 @@
!27 = metadata !{i32 8, i32 1, metadata !13, null}
!28 = metadata !{metadata !"bar.c", metadata !"/Users/echristo/tmp"}
!29 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
-!30 = metadata !{i64 2}
+!30 = metadata !{i32 786690, i64 6} ; [DW_OP_deref]
diff --git a/llvm/test/DebugInfo/X86/parameters.ll b/llvm/test/DebugInfo/X86/parameters.ll
index eadd369..eb85f2c 100644
--- a/llvm/test/DebugInfo/X86/parameters.ll
+++ b/llvm/test/DebugInfo/X86/parameters.ll
@@ -42,13 +42,13 @@
; Function Attrs: uwtable
define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %f}, metadata !22), !dbg !24
+ call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %f}, metadata !22, metadata !{i32 786690}), !dbg !24
call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25
ret void, !dbg !25
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"*, %"struct.pr14763::foo"*) #2
@@ -58,8 +58,8 @@
%b.addr = alloca i8, align 1
%frombool = zext i1 %b to i8
store i8 %frombool, i8* %b.addr, align 1
- call void @llvm.dbg.declare(metadata !{i8* %b.addr}, metadata !26), !dbg !27
- call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %g}, metadata !28), !dbg !27
+ call void @llvm.dbg.declare(metadata !{i8* %b.addr}, metadata !26, metadata !{i32 786690}), !dbg !27
+ call void @llvm.dbg.declare(metadata !{%"struct.pr14763::foo"* %g}, metadata !28, metadata !{i32 786690}), !dbg !27
%0 = load i8* %b.addr, align 1, !dbg !29
%tobool = trunc i8 %0 to i1, !dbg !29
br i1 %tobool, label %if.then, label %if.end, !dbg !29
diff --git a/llvm/test/DebugInfo/X86/pieces-1.ll b/llvm/test/DebugInfo/X86/pieces-1.ll
index fe3b7dc..e7d3252 100644
--- a/llvm/test/DebugInfo/X86/pieces-1.ll
+++ b/llvm/test/DebugInfo/X86/pieces-1.ll
@@ -32,16 +32,16 @@
; Function Attrs: nounwind ssp uwtable
define i32 @foo(i64 %s.coerce0, i32 %s.coerce1) #0 {
entry:
- call void @llvm.dbg.value(metadata !{i64 %s.coerce0}, i64 0, metadata !20), !dbg !21
- call void @llvm.dbg.value(metadata !{i32 %s.coerce1}, i64 0, metadata !22), !dbg !21
+ call void @llvm.dbg.value(metadata !{i64 %s.coerce0}, i64 0, metadata !20, metadata !24), !dbg !21
+ call void @llvm.dbg.value(metadata !{i32 %s.coerce1}, i64 0, metadata !22, metadata !27), !dbg !21
ret i32 %s.coerce1, !dbg !23
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" }
attributes #1 = { nounwind readnone }
@@ -70,10 +70,10 @@
!17 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}
!18 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
!19 = metadata !{metadata !"clang version 3.5 "}
-!20 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0, metadata !24} ; [ DW_TAG_arg_variable ] [s] [line 3] [piece, size 8, offset 0]
+!20 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [s] [line 3]
!21 = metadata !{i32 3, i32 0, metadata !4, null}
-!22 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0, metadata !27} ; [ DW_TAG_arg_variable ] [s] [line 3] [piece, size 4, offset 8]
+!22 = metadata !{i32 786689, metadata !4, metadata !"s", metadata !5, i32 16777219, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [s] [line 3]
!23 = metadata !{i32 4, i32 0, metadata !4, null}
-!24 = metadata !{i64 3, i64 0, i64 8}
+!24 = metadata !{i32 786690, i64 147, i64 0, i64 8} ; [DW_OP_piece 0 8] [piece, size 8, offset 0]
!25 = metadata !{}
-!27 = metadata !{i64 3, i64 8, i64 4}
+!27 = metadata !{i32 786690, i64 147, i64 8, i64 4} ; [DW_OP_piece 8 4] [piece, size 4, offset 8]
diff --git a/llvm/test/DebugInfo/X86/pieces-2.ll b/llvm/test/DebugInfo/X86/pieces-2.ll
index 083d48c..5bd053a 100644
--- a/llvm/test/DebugInfo/X86/pieces-2.ll
+++ b/llvm/test/DebugInfo/X86/pieces-2.ll
@@ -31,23 +31,23 @@
; Function Attrs: nounwind ssp uwtable
define i32 @foo(%struct.Outer* byval align 8 %outer) #0 {
entry:
- call void @llvm.dbg.declare(metadata !{%struct.Outer* %outer}, metadata !25), !dbg !26
+ call void @llvm.dbg.declare(metadata !{%struct.Outer* %outer}, metadata !25, metadata !{i32 786690}), !dbg !26
%i1.sroa.0.0..sroa_idx = getelementptr inbounds %struct.Outer* %outer, i64 0, i32 0, i64 1, i32 0, !dbg !27
%i1.sroa.0.0.copyload = load i32* %i1.sroa.0.0..sroa_idx, align 8, !dbg !27
- call void @llvm.dbg.value(metadata !{i32 %i1.sroa.0.0.copyload}, i64 0, metadata !28), !dbg !27
+ call void @llvm.dbg.value(metadata !{i32 %i1.sroa.0.0.copyload}, i64 0, metadata !28, metadata !29), !dbg !27
%i1.sroa.2.0..sroa_raw_cast = bitcast %struct.Outer* %outer to i8*, !dbg !27
%i1.sroa.2.0..sroa_raw_idx = getelementptr inbounds i8* %i1.sroa.2.0..sroa_raw_cast, i64 20, !dbg !27
ret i32 %i1.sroa.0.0.copyload, !dbg !32
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
@@ -85,8 +85,8 @@
!25 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [outer] [line 10]
!26 = metadata !{i32 10, i32 0, metadata !4, null}
!27 = metadata !{i32 11, i32 0, metadata !4, null}
-!28 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0, metadata !29} ; [ DW_TAG_auto_variable ] [i1] [line 11] [piece, size 4, offset 0]
-!29 = metadata !{i32 3, i32 0, i32 4}
+!28 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [i1] [line 11]
+!29 = metadata !{i32 786690, i32 147, i32 0, i32 4} ; [DW_OP_piece 0 4] [piece, size 4, offset 0]
!30 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0, metadata !31} ; [ DW_TAG_auto_variable ] [i1] [line 11] [piece, size 12, offset 0]
!31 = metadata !{i32 3, i32 0, i32 12}
!32 = metadata !{i32 12, i32 0, metadata !4, null}
diff --git a/llvm/test/DebugInfo/X86/pieces-3.ll b/llvm/test/DebugInfo/X86/pieces-3.ll
index 4ce7bea..123e7e1 100644
--- a/llvm/test/DebugInfo/X86/pieces-3.ll
+++ b/llvm/test/DebugInfo/X86/pieces-3.ll
@@ -19,10 +19,10 @@
; CHECK-NEXT: DW_AT_location [DW_FORM_data4] ([[LOC:.*]])
; CHECK-NEXT: DW_AT_name {{.*}}"outer"
; CHECK: DW_TAG_variable
-; rsi, piece 0x00000004, bit-piece 32 0
-; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x06> 54 93 04 9d 20 00 )
+; rsi, piece 0x00000004
+; CHECK-NEXT: DW_AT_location [DW_FORM_block1] {{.*}} 54 93 04
; CHECK-NEXT: "i1"
-
+;
; CHECK: .debug_loc
; CHECK: [[LOC]]:
; CHECK: Beginning address offset: 0x0000000000000000
@@ -36,28 +36,28 @@
; Function Attrs: nounwind ssp uwtable
define i32 @foo(i64 %outer.coerce0, i64 %outer.coerce1) #0 {
- call void @llvm.dbg.value(metadata !{i64 %outer.coerce0}, i64 0, metadata !24), !dbg !26
- call void @llvm.dbg.declare(metadata !{null}, metadata !27), !dbg !26
- call void @llvm.dbg.value(metadata !{i64 %outer.coerce1}, i64 0, metadata !29), !dbg !26
- call void @llvm.dbg.declare(metadata !{null}, metadata !31), !dbg !26
+ call void @llvm.dbg.value(metadata !{i64 %outer.coerce0}, i64 0, metadata !24, metadata !25), !dbg !26
+ call void @llvm.dbg.declare(metadata !{null}, metadata !27, metadata !28), !dbg !26
+ call void @llvm.dbg.value(metadata !{i64 %outer.coerce1}, i64 0, metadata !29, metadata !30), !dbg !26
+ call void @llvm.dbg.declare(metadata !{null}, metadata !31, metadata !32), !dbg !26
%outer.sroa.1.8.extract.trunc = trunc i64 %outer.coerce1 to i32, !dbg !33
- call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.8.extract.trunc}, i64 0, metadata !34), !dbg !33
+ call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.8.extract.trunc}, i64 0, metadata !34, metadata !35), !dbg !33
%outer.sroa.1.12.extract.shift = lshr i64 %outer.coerce1, 32, !dbg !33
%outer.sroa.1.12.extract.trunc = trunc i64 %outer.sroa.1.12.extract.shift to i32, !dbg !33
- call void @llvm.dbg.value(metadata !{i64 %outer.sroa.1.12.extract.shift}, i64 0, metadata !34), !dbg !33
- call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.12.extract.trunc}, i64 0, metadata !34), !dbg !33
- call void @llvm.dbg.declare(metadata !{null}, metadata !34), !dbg !33
+ call void @llvm.dbg.value(metadata !{i64 %outer.sroa.1.12.extract.shift}, i64 0, metadata !34, metadata !35), !dbg !33
+ call void @llvm.dbg.value(metadata !{i32 %outer.sroa.1.12.extract.trunc}, i64 0, metadata !34, metadata !35), !dbg !33
+ call void @llvm.dbg.declare(metadata !{null}, metadata !34, metadata !35), !dbg !33
ret i32 %outer.sroa.1.8.extract.trunc, !dbg !36
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #2
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" }
attributes #1 = { nounwind readnone }
@@ -91,16 +91,16 @@
!21 = metadata !{i32 2, metadata !"Dwarf Version", i32 2}
!22 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
!23 = metadata !{metadata !"clang version 3.5.0 "}
-!24 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !25} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 8, offset 0]
-!25 = metadata !{i32 3, i32 0, i32 8}
+!24 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
+!25 = metadata !{i32 786690, i32 147, i32 0, i32 8} ; [DW_OP_piece 0 8] [piece, size 8, offset 0]
!26 = metadata !{i32 10, i32 0, metadata !4, null}
-!27 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !28} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 8, offset 8]
-!28 = metadata !{i32 3, i32 8, i32 8}
-!29 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !30} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 4, offset 12]
-!30 = metadata !{i32 3, i32 12, i32 4}
-!31 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0, metadata !32} ; [ DW_TAG_arg_variable ] [outer] [line 10] [piece, size 4, offset 8]
-!32 = metadata !{i32 3, i32 8, i32 4}
+!27 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
+!28 = metadata !{i32 786690, i32 147, i32 8, i32 8} ; [DW_OP_piece 8 8] [piece, size 8, offset 8]
+!29 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
+!30 = metadata !{i32 786690, i32 147, i32 12, i32 4} ; [DW_OP_piece 12 4] [piece, size 4, offset 12]
+!31 = metadata !{i32 786689, metadata !4, metadata !"outer", metadata !5, i32 16777226, metadata !9, i32 0, i32 0} ;; [ DW_TAG_arg_variable ] [outer] [line 10]
+!32 = metadata !{i32 786690, i32 147, i32 8, i32 4} ; [DW_OP_piece 8 4] [piece, size 4, offset 8]
!33 = metadata !{i32 11, i32 0, metadata !4, null}
-!34 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0, metadata !35} ; [ DW_TAG_auto_variable ] [i1] [line 11] [piece, size 4, offset 0]
-!35 = metadata !{i32 3, i32 0, i32 4}
+!34 = metadata !{i32 786688, metadata !4, metadata !"i1", metadata !5, i32 11, metadata !14, i32 0, i32 0} ;; [ DW_TAG_auto_variable ] [i1] [line 11]
+!35 = metadata !{i32 786690, i32 147, i32 0, i32 4} ; [DW_OP_piece 0 4] [piece, size 4, offset 0]
!36 = metadata !{i32 12, i32 0, metadata !4, null}
diff --git a/llvm/test/DebugInfo/X86/pr11300.ll b/llvm/test/DebugInfo/X86/pr11300.ll
index 11c409c..1107618 100644
--- a/llvm/test/DebugInfo/X86/pr11300.ll
+++ b/llvm/test/DebugInfo/X86/pr11300.ll
@@ -18,19 +18,19 @@
entry:
%x.addr = alloca %struct.foo*, align 8
store %struct.foo* %x, %struct.foo** %x.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %x.addr}, metadata !23), !dbg !24
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %x.addr}, metadata !23, metadata !{i32 786690}), !dbg !24
%0 = load %struct.foo** %x.addr, align 8, !dbg !25
call void @_ZN3foo3barEv(%struct.foo* %0), !dbg !25
ret void, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define linkonce_odr void @_ZN3foo3barEv(%struct.foo* %this) nounwind uwtable align 2 {
entry:
%this.addr = alloca %struct.foo*, align 8
store %struct.foo* %this, %struct.foo** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !28), !dbg !29
+ call void @llvm.dbg.declare(metadata !{%struct.foo** %this.addr}, metadata !28, metadata !{i32 786690}), !dbg !29
%this1 = load %struct.foo** %this.addr
ret void, !dbg !30
}
diff --git a/llvm/test/DebugInfo/X86/pr12831.ll b/llvm/test/DebugInfo/X86/pr12831.ll
index a67f001..5d78429 100644
--- a/llvm/test/DebugInfo/X86/pr12831.ll
+++ b/llvm/test/DebugInfo/X86/pr12831.ll
@@ -20,7 +20,7 @@
%agg.tmp4 = alloca %class.function, align 1
%agg.tmp5 = alloca %class.anon.0, align 1
store %class.BPLFunctionWriter* %this, %class.BPLFunctionWriter** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.BPLFunctionWriter** %this.addr}, metadata !133), !dbg !135
+ call void @llvm.dbg.declare(metadata !{%class.BPLFunctionWriter** %this.addr}, metadata !133, metadata !{i32 786690}), !dbg !135
%this1 = load %class.BPLFunctionWriter** %this.addr
%MW = getelementptr inbounds %class.BPLFunctionWriter* %this1, i32 0, i32 0, !dbg !136
%0 = load %struct.BPLModuleWriter** %MW, align 8, !dbg !136
@@ -33,7 +33,7 @@
ret void, !dbg !139
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare void @_ZN15BPLModuleWriter14writeIntrinsicE8functionIFvvEE(%struct.BPLModuleWriter*)
@@ -42,8 +42,8 @@
%this.addr = alloca %class.function*, align 8
%__f = alloca %class.anon.0, align 1
store %class.function* %this, %class.function** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !140), !dbg !142
- call void @llvm.dbg.declare(metadata !{%class.anon.0* %__f}, metadata !143), !dbg !144
+ call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !140, metadata !{i32 786690}), !dbg !142
+ call void @llvm.dbg.declare(metadata !{%class.anon.0* %__f}, metadata !143, metadata !{i32 786690}), !dbg !144
%this1 = load %class.function** %this.addr
call void @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_"(%class.anon.0* %__f), !dbg !145
ret void, !dbg !147
@@ -61,8 +61,8 @@
%this.addr = alloca %class.function*, align 8
%__f = alloca %class.anon, align 1
store %class.function* %this, %class.function** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !150), !dbg !151
- call void @llvm.dbg.declare(metadata !{%class.anon* %__f}, metadata !152), !dbg !153
+ call void @llvm.dbg.declare(metadata !{%class.function** %this.addr}, metadata !150, metadata !{i32 786690}), !dbg !151
+ call void @llvm.dbg.declare(metadata !{%class.anon* %__f}, metadata !152, metadata !{i32 786690}), !dbg !153
%this1 = load %class.function** %this.addr
call void @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_"(%class.anon* %__f), !dbg !154
ret void, !dbg !156
diff --git a/llvm/test/DebugInfo/X86/pr19307.ll b/llvm/test/DebugInfo/X86/pr19307.ll
index 07e3a42..a576c9a 100644
--- a/llvm/test/DebugInfo/X86/pr19307.ll
+++ b/llvm/test/DebugInfo/X86/pr19307.ll
@@ -42,10 +42,10 @@
%offset.addr = alloca i64*, align 8
%limit.addr = alloca i64*, align 8
store i64* %offset, i64** %offset.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64** %offset.addr}, metadata !45), !dbg !46
+ call void @llvm.dbg.declare(metadata !{i64** %offset.addr}, metadata !45, metadata !{i32 786690}), !dbg !46
store i64* %limit, i64** %limit.addr, align 8
- call void @llvm.dbg.declare(metadata !{i64** %limit.addr}, metadata !47), !dbg !46
- call void @llvm.dbg.declare(metadata !{%"class.std::basic_string"* %range}, metadata !48), !dbg !49
+ call void @llvm.dbg.declare(metadata !{i64** %limit.addr}, metadata !47, metadata !{i32 786690}), !dbg !46
+ call void @llvm.dbg.declare(metadata !{%"class.std::basic_string"* %range}, metadata !48, metadata !{i32 786690}), !dbg !49
%call = call i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"* %range, i64 0, i64 6, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0)), !dbg !50
%cmp = icmp ne i32 %call, 0, !dbg !50
br i1 %cmp, label %if.then, label %lor.lhs.false, !dbg !50
@@ -70,7 +70,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"*, i64, i64, i8*) #2
diff --git a/llvm/test/DebugInfo/X86/recursive_inlining.ll b/llvm/test/DebugInfo/X86/recursive_inlining.ll
index 2a70bef..4eafb65 100644
--- a/llvm/test/DebugInfo/X86/recursive_inlining.ll
+++ b/llvm/test/DebugInfo/X86/recursive_inlining.ll
@@ -95,7 +95,7 @@
entry:
tail call void @_Z3fn8v() #3, !dbg !31
%0 = load %struct.C** @x, align 8, !dbg !32, !tbaa !33
- tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !37) #3, !dbg !38
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !37, metadata !{i32 786690}) #3, !dbg !38
tail call void @_Z3fn8v() #3, !dbg !39
%b.i = getelementptr inbounds %struct.C* %0, i64 0, i32 0, !dbg !40
%1 = load i32* %b.i, align 4, !dbg !40, !tbaa !42
@@ -116,7 +116,7 @@
; Function Attrs: nounwind
define linkonce_odr void @_ZN1C5m_fn2Ev(%struct.C* nocapture readonly %this) #0 align 2 {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.C* %this}, i64 0, metadata !24), !dbg !49
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %this}, i64 0, metadata !24, metadata !{i32 786690}), !dbg !49
tail call void @_Z3fn8v() #3, !dbg !50
%b = getelementptr inbounds %struct.C* %this, i64 0, i32 0, !dbg !51
%0 = load i32* %b, align 4, !dbg !51, !tbaa !42
@@ -130,7 +130,7 @@
if.end: ; preds = %entry, %if.then
tail call void @_Z3fn8v() #3, !dbg !53
%1 = load %struct.C** @x, align 8, !dbg !56, !tbaa !33
- tail call void @llvm.dbg.value(metadata !{%struct.C* %1}, i64 0, metadata !57) #3, !dbg !58
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %1}, i64 0, metadata !57, metadata !{i32 786690}) #3, !dbg !58
tail call void @_Z3fn8v() #3, !dbg !59
%b.i.i = getelementptr inbounds %struct.C* %1, i64 0, i32 0, !dbg !60
%2 = load i32* %b.i.i, align 4, !dbg !60, !tbaa !42
@@ -154,7 +154,7 @@
tailrecurse: ; preds = %tailrecurse.backedge, %entry
tail call void @_Z3fn8v() #3, !dbg !64
%0 = load %struct.C** @x, align 8, !dbg !66, !tbaa !33
- tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !67) #3, !dbg !68
+ tail call void @llvm.dbg.value(metadata !{%struct.C* %0}, i64 0, metadata !67, metadata !{i32 786690}) #3, !dbg !68
tail call void @_Z3fn8v() #3, !dbg !69
%b.i.i = getelementptr inbounds %struct.C* %0, i64 0, i32 0, !dbg !70
%1 = load i32* %b.i.i, align 4, !dbg !70, !tbaa !42
@@ -188,7 +188,7 @@
declare void @_Z3fn2iiii(i32, i32, i32, i32) #1
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #2
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/DebugInfo/X86/reference-argument.ll b/llvm/test/DebugInfo/X86/reference-argument.ll
index 4a6bdca..282380d 100644
--- a/llvm/test/DebugInfo/X86/reference-argument.ll
+++ b/llvm/test/DebugInfo/X86/reference-argument.ll
@@ -13,15 +13,15 @@
%class.A = type { i8 }
declare void @_Z3barR4SVal(%class.SVal* %v)
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare i32 @main()
; Function Attrs: nounwind ssp uwtable
define linkonce_odr void @_ZN1A3fooE4SVal(%class.A* %this, %class.SVal* %v) nounwind ssp uwtable align 2 {
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !59), !dbg !61
- call void @llvm.dbg.declare(metadata !{%class.SVal* %v}, metadata !62), !dbg !61
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !59, metadata !{i32 786690}), !dbg !61
+ call void @llvm.dbg.declare(metadata !{%class.SVal* %v}, metadata !62, metadata !{i32 786690}), !dbg !61
%this1 = load %class.A** %this.addr
call void @_Z3barR4SVal(%class.SVal* %v), !dbg !61
ret void, !dbg !61
diff --git a/llvm/test/DebugInfo/X86/rvalue-ref.ll b/llvm/test/DebugInfo/X86/rvalue-ref.ll
index b8ed021..07f0d80 100644
--- a/llvm/test/DebugInfo/X86/rvalue-ref.ll
+++ b/llvm/test/DebugInfo/X86/rvalue-ref.ll
@@ -9,14 +9,14 @@
entry:
%i.addr = alloca i32*, align 8
store i32* %i, i32** %i.addr, align 8
- call void @llvm.dbg.declare(metadata !{i32** %i.addr}, metadata !11), !dbg !12
+ call void @llvm.dbg.declare(metadata !{i32** %i.addr}, metadata !11, metadata !{i32 786690}), !dbg !12
%0 = load i32** %i.addr, align 8, !dbg !13
%1 = load i32* %0, align 4, !dbg !13
%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %1), !dbg !13
ret void, !dbg !15
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare i32 @printf(i8*, ...)
diff --git a/llvm/test/DebugInfo/X86/sret.ll b/llvm/test/DebugInfo/X86/sret.ll
index be425de..af219ca 100644
--- a/llvm/test/DebugInfo/X86/sret.ll
+++ b/llvm/test/DebugInfo/X86/sret.ll
@@ -23,9 +23,9 @@
%this.addr = alloca %class.A*, align 8
%i.addr = alloca i32, align 4
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !67), !dbg !69
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !67, metadata !{i32 786690}), !dbg !69
store i32 %i, i32* %i.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !70), !dbg !71
+ call void @llvm.dbg.declare(metadata !{i32* %i.addr}, metadata !70, metadata !{i32 786690}), !dbg !71
%this1 = load %class.A** %this.addr
%0 = bitcast %class.A* %this1 to i8***, !dbg !72
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV1A, i64 0, i64 2), i8*** %0, !dbg !72
@@ -36,7 +36,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind uwtable
define void @_ZN1AC2ERKS_(%class.A* %this, %class.A* %rhs) unnamed_addr #0 align 2 {
@@ -44,9 +44,9 @@
%this.addr = alloca %class.A*, align 8
%rhs.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !74), !dbg !75
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !74, metadata !{i32 786690}), !dbg !75
store %class.A* %rhs, %class.A** %rhs.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !76), !dbg !77
+ call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !76, metadata !{i32 786690}), !dbg !77
%this1 = load %class.A** %this.addr
%0 = bitcast %class.A* %this1 to i8***, !dbg !78
store i8** getelementptr inbounds ([4 x i8*]* @_ZTV1A, i64 0, i64 2), i8*** %0, !dbg !78
@@ -64,9 +64,9 @@
%this.addr = alloca %class.A*, align 8
%rhs.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !80), !dbg !81
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !80, metadata !{i32 786690}), !dbg !81
store %class.A* %rhs, %class.A** %rhs.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !82), !dbg !83
+ call void @llvm.dbg.declare(metadata !{%class.A** %rhs.addr}, metadata !82, metadata !{i32 786690}), !dbg !83
%this1 = load %class.A** %this.addr
%0 = load %class.A** %rhs.addr, align 8, !dbg !84
%m_int = getelementptr inbounds %class.A* %0, i32 0, i32 1, !dbg !84
@@ -81,7 +81,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !86), !dbg !87
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !86, metadata !{i32 786690}), !dbg !87
%this1 = load %class.A** %this.addr
%m_int = getelementptr inbounds %class.A* %this1, i32 0, i32 1, !dbg !88
%0 = load i32* %m_int, align 4, !dbg !88
@@ -95,10 +95,10 @@
%nrvo = alloca i1
%cleanup.dest.slot = alloca i32
store %class.B* %this, %class.B** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !89), !dbg !91
+ call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !89, metadata !{i32 786690}), !dbg !91
%this1 = load %class.B** %this.addr
store i1 false, i1* %nrvo, !dbg !92
- call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !93), !dbg !92
+ call void @llvm.dbg.declare(metadata !{%class.A* %agg.result}, metadata !93, metadata !{i32 786690}), !dbg !92
call void @_ZN1AC1Ei(%class.A* %agg.result, i32 12), !dbg !92
store i1 true, i1* %nrvo, !dbg !94
store i32 1, i32* %cleanup.dest.slot
@@ -118,7 +118,7 @@
entry:
%this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !101), !dbg !102
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !101, metadata !{i32 786690}), !dbg !102
%this1 = load %class.A** %this.addr
ret void, !dbg !103
}
@@ -138,12 +138,12 @@
%cleanup.dest.slot = alloca i32
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !104), !dbg !105
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !104, metadata !{i32 786690}), !dbg !105
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !106), !dbg !105
- call void @llvm.dbg.declare(metadata !{%class.B* %b}, metadata !107), !dbg !108
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !106, metadata !{i32 786690}), !dbg !105
+ call void @llvm.dbg.declare(metadata !{%class.B* %b}, metadata !107, metadata !{i32 786690}), !dbg !108
call void @_ZN1BC2Ev(%class.B* %b), !dbg !108
- call void @llvm.dbg.declare(metadata !{i32* %return_val}, metadata !109), !dbg !110
+ call void @llvm.dbg.declare(metadata !{i32* %return_val}, metadata !109, metadata !{i32 786690}), !dbg !110
call void @_ZN1B9AInstanceEv(%class.A* sret %temp.lvalue, %class.B* %b), !dbg !110
%call = invoke i32 @_ZN1A7get_intEv(%class.A* %temp.lvalue)
to label %invoke.cont unwind label %lpad, !dbg !110
@@ -151,7 +151,7 @@
invoke.cont: ; preds = %entry
call void @_ZN1AD2Ev(%class.A* %temp.lvalue), !dbg !111
store i32 %call, i32* %return_val, align 4, !dbg !111
- call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !113), !dbg !114
+ call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !113, metadata !{i32 786690}), !dbg !114
call void @_ZN1B9AInstanceEv(%class.A* sret %a, %class.B* %b), !dbg !114
%0 = load i32* %return_val, align 4, !dbg !115
store i32 %0, i32* %retval, !dbg !115
@@ -193,7 +193,7 @@
entry:
%this.addr = alloca %class.B*, align 8
store %class.B* %this, %class.B** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !123), !dbg !124
+ call void @llvm.dbg.declare(metadata !{%class.B** %this.addr}, metadata !123, metadata !{i32 786690}), !dbg !124
%this1 = load %class.B** %this.addr
ret void, !dbg !125
}
@@ -218,7 +218,7 @@
%exn.slot = alloca i8*
%ehselector.slot = alloca i32
store %class.A* %this, %class.A** %this.addr, align 8
- call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !126), !dbg !127
+ call void @llvm.dbg.declare(metadata !{%class.A** %this.addr}, metadata !126, metadata !{i32 786690}), !dbg !127
%this1 = load %class.A** %this.addr
invoke void @_ZN1AD2Ev(%class.A* %this1)
to label %invoke.cont unwind label %lpad, !dbg !128
diff --git a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
index 8816fe7..75819ce 100644
--- a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
+++ b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
@@ -60,19 +60,19 @@
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !15, metadata !{i32 786690}), !dbg !16
%0 = load i32* %a.addr, align 4, !dbg !17
%call = call i32 @fn(i32 %0), !dbg !17
ret i32 %call, !dbg !17
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define i32 @fn(i32 %a) nounwind uwtable ssp {
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !19), !dbg !20
+ call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !19, metadata !{i32 786690}), !dbg !20
%0 = load i32* %a.addr, align 4, !dbg !21
ret i32 %0, !dbg !21
}
diff --git a/llvm/test/DebugInfo/X86/subrange-type.ll b/llvm/test/DebugInfo/X86/subrange-type.ll
index 14dca46..b561923 100644
--- a/llvm/test/DebugInfo/X86/subrange-type.ll
+++ b/llvm/test/DebugInfo/X86/subrange-type.ll
@@ -12,11 +12,11 @@
%retval = alloca i32, align 4
%i = alloca [2 x i32], align 4
store i32 0, i32* %retval
- call void @llvm.dbg.declare(metadata !{[2 x i32]* %i}, metadata !10), !dbg !15
+ call void @llvm.dbg.declare(metadata !{[2 x i32]* %i}, metadata !10, metadata !{i32 786690}), !dbg !15
ret i32 0, !dbg !16
}
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18}
diff --git a/llvm/test/DebugInfo/X86/subreg.ll b/llvm/test/DebugInfo/X86/subreg.ll
index ba13d35..99a766d 100644
--- a/llvm/test/DebugInfo/X86/subreg.ll
+++ b/llvm/test/DebugInfo/X86/subreg.ll
@@ -10,13 +10,13 @@
define i16 @f(i16 signext %zzz) nounwind {
entry:
- call void @llvm.dbg.value(metadata !{i16 %zzz}, i64 0, metadata !0)
+ call void @llvm.dbg.value(metadata !{i16 %zzz}, i64 0, metadata !0, metadata !{i32 786690})
%conv = sext i16 %zzz to i32, !dbg !7
%conv1 = trunc i32 %conv to i16
ret i16 %conv1
}
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!11}
diff --git a/llvm/test/DebugInfo/X86/subregisters.ll b/llvm/test/DebugInfo/X86/subregisters.ll
index 2f2fd44..7ef5f4a 100644
--- a/llvm/test/DebugInfo/X86/subregisters.ll
+++ b/llvm/test/DebugInfo/X86/subregisters.ll
@@ -40,16 +40,16 @@
; Function Attrs: noinline nounwind ssp uwtable
define void @doSomething(%struct.bar* nocapture readonly %b) #0 {
entry:
- tail call void @llvm.dbg.value(metadata !{%struct.bar* %b}, i64 0, metadata !15), !dbg !25
+ tail call void @llvm.dbg.value(metadata !{%struct.bar* %b}, i64 0, metadata !15, metadata !{i32 786690}), !dbg !25
%a1 = getelementptr inbounds %struct.bar* %b, i64 0, i32 0, !dbg !26
%0 = load i32* %a1, align 4, !dbg !26, !tbaa !27
- tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !16), !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !26
%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i32 %0) #4, !dbg !32
ret void, !dbg !33
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind
declare i32 @printf(i8* nocapture readonly, ...) #2
@@ -59,14 +59,14 @@
entry:
%myBar = alloca i64, align 8, !dbg !34
%tmpcast = bitcast i64* %myBar to %struct.bar*, !dbg !34
- tail call void @llvm.dbg.declare(metadata !{%struct.bar* %tmpcast}, metadata !21), !dbg !34
+ tail call void @llvm.dbg.declare(metadata !{%struct.bar* %tmpcast}, metadata !21, metadata !{i32 786690}), !dbg !34
store i64 17179869187, i64* %myBar, align 8, !dbg !34
call void @doSomething(%struct.bar* %tmpcast), !dbg !35
ret i32 0, !dbg !36
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.value(metadata, i64, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { noinline nounwind ssp uwtable }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/union-template.ll b/llvm/test/DebugInfo/X86/union-template.ll
index 5fdb349..baeb107 100644
--- a/llvm/test/DebugInfo/X86/union-template.ll
+++ b/llvm/test/DebugInfo/X86/union-template.ll
@@ -16,12 +16,12 @@
%value.addr = alloca float, align 4
%tempValue = alloca %"union.PR15637::Value", align 4
store float %value, float* %value.addr, align 4
- call void @llvm.dbg.declare(metadata !{float* %value.addr}, metadata !23), !dbg !24
- call void @llvm.dbg.declare(metadata !{%"union.PR15637::Value"* %tempValue}, metadata !25), !dbg !26
+ call void @llvm.dbg.declare(metadata !{float* %value.addr}, metadata !23, metadata !{i32 786690}), !dbg !24
+ call void @llvm.dbg.declare(metadata !{%"union.PR15637::Value"* %tempValue}, metadata !25, metadata !{i32 786690}), !dbg !26
ret void, !dbg !27
}
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/X86/vla.ll b/llvm/test/DebugInfo/X86/vla.ll
index 3e6f4ce..daaba41 100644
--- a/llvm/test/DebugInfo/X86/vla.ll
+++ b/llvm/test/DebugInfo/X86/vla.ll
@@ -27,13 +27,13 @@
%saved_stack = alloca i8*
%cleanup.dest.slot = alloca i32
store i32 %n, i32* %n.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %n.addr}, metadata !15), !dbg !16
+ call void @llvm.dbg.declare(metadata !{i32* %n.addr}, metadata !15, metadata !{i32 786690}), !dbg !16
%0 = load i32* %n.addr, align 4, !dbg !17
%1 = zext i32 %0 to i64, !dbg !17
%2 = call i8* @llvm.stacksave(), !dbg !17
store i8* %2, i8** %saved_stack, !dbg !17
%vla = alloca i32, i64 %1, align 16, !dbg !17
- call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !18), !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !18, metadata !{i32 786690}), !dbg !17
%arrayidx = getelementptr inbounds i32* %vla, i64 0, !dbg !22
store i32 42, i32* %arrayidx, align 4, !dbg !22
%3 = load i32* %n.addr, align 4, !dbg !23
@@ -48,7 +48,7 @@
}
; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
; Function Attrs: nounwind
declare i8* @llvm.stacksave() nounwind
@@ -64,9 +64,9 @@
%argv.addr = alloca i8**, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
- call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !25), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !25, metadata !{i32 786690}), !dbg !26
store i8** %argv, i8*** %argv.addr, align 8
- call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !27), !dbg !26
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !27, metadata !{i32 786690}), !dbg !26
%0 = load i32* %argc.addr, align 4, !dbg !28
%call = call i32 @vla(i32 %0), !dbg !28
ret i32 %call, !dbg !28