[Alignment][NFC] Use Align for TargetFrameLowering/Subtarget
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68993
llvm-svn: 375084
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
index e807977..e35b6d0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
@@ -13,9 +13,9 @@
#include "AMDGPUFrameLowering.h"
using namespace llvm;
-AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, unsigned StackAl,
- int LAO, unsigned TransAl)
- : TargetFrameLowering(D, StackAl, LAO, TransAl) { }
+AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, Align StackAl,
+ int LAO, unsigned TransAl)
+ : TargetFrameLowering(D, StackAl, LAO, TransAl) {}
AMDGPUFrameLowering::~AMDGPUFrameLowering() = default;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
index 48b6448..090e2bc 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
@@ -25,7 +25,7 @@
/// See TargetFrameInfo for more comments.
class AMDGPUFrameLowering : public TargetFrameLowering {
public:
- AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
+ AMDGPUFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1);
~AMDGPUFrameLowering() override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index f5848aa..936feb0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -866,9 +866,7 @@
// on the pointer value itself may rely on the alignment / known low bits of
// the pointer. Set this to something above the minimum to avoid needing
// dynamic realignment in common cases.
- unsigned getStackAlignment() const {
- return 16;
- }
+ Align getStackAlignment() const { return Align(16); }
bool enableMachineScheduler() const override {
return true;
@@ -1257,9 +1255,7 @@
return Gen;
}
- unsigned getStackAlignment() const {
- return 4;
- }
+ Align getStackAlignment() const { return Align(4); }
R600Subtarget &initializeSubtargetDependencies(const Triple &TT,
StringRef GPU, StringRef FS);
diff --git a/llvm/lib/Target/AMDGPU/R600FrameLowering.h b/llvm/lib/Target/AMDGPU/R600FrameLowering.h
index 950e238..5b24901 100644
--- a/llvm/lib/Target/AMDGPU/R600FrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/R600FrameLowering.h
@@ -15,9 +15,9 @@
class R600FrameLowering : public AMDGPUFrameLowering {
public:
- R600FrameLowering(StackDirection D, unsigned StackAl, int LAO,
- unsigned TransAl = 1) :
- AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
+ R600FrameLowering(StackDirection D, Align StackAl, int LAO,
+ unsigned TransAl = 1)
+ : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~R600FrameLowering() override;
void emitPrologue(MachineFunction &MF,
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.h b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
index c644f47..6e07dac 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
@@ -20,9 +20,9 @@
class SIFrameLowering final : public AMDGPUFrameLowering {
public:
- SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
- unsigned TransAl = 1) :
- AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
+ SIFrameLowering(StackDirection D, Align StackAl, int LAO,
+ unsigned TransAl = 1)
+ : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~SIFrameLowering() override = default;
void emitEntryFunctionPrologue(MachineFunction &MF,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 1809817..cb92932 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2816,7 +2816,7 @@
int32_t Offset = LocMemOffset;
SDValue PtrOff = DAG.getConstant(Offset, DL, PtrVT);
- unsigned Align = 0;
+ MaybeAlign Alignment;
if (IsTailCall) {
ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
@@ -2824,8 +2824,10 @@
Flags.getByValSize() : VA.getValVT().getStoreSize();
// FIXME: We can have better than the minimum byval required alignment.
- Align = Flags.isByVal() ? Flags.getByValAlign() :
- MinAlign(Subtarget->getStackAlignment(), Offset);
+ Alignment =
+ Flags.isByVal()
+ ? MaybeAlign(Flags.getByValAlign())
+ : commonAlignment(Subtarget->getStackAlignment(), Offset);
Offset = Offset + FPDiff;
int FI = MFI.CreateFixedObject(OpSize, Offset, true);
@@ -2844,7 +2846,8 @@
} else {
DstAddr = PtrOff;
DstInfo = MachinePointerInfo::getStack(MF, LocMemOffset);
- Align = MinAlign(Subtarget->getStackAlignment(), LocMemOffset);
+ Alignment =
+ commonAlignment(Subtarget->getStackAlignment(), LocMemOffset);
}
if (Outs[i].Flags.isByVal()) {
@@ -2859,7 +2862,8 @@
MemOpChains.push_back(Cpy);
} else {
- SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo, Align);
+ SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo,
+ Alignment ? Alignment->value() : 0);
MemOpChains.push_back(Store);
}
}