commit 88eb8dd4ed11dafb125c46909c84f10e7037d2b7
author Sean Silva <silvas@purdue.edu> Wed Oct 10 20:24:47 2012 +0000
committer Sean Silva <silvas@purdue.edu> Wed Oct 10 20:24:47 2012 +0000
tree 94da7fc02a9882da6a73c9009f5252497a05fb5a
parent fb509ed1567eff9495ee63a70a48ab2e0c25d0d1

tblgen: Use semantically correct RTTI functions.

Also, some minor cleanup.

llvm-svn: 165647

llvm/utils/TableGen/FixedLenDecoderEmitter.cpp

diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
index aa4dd8a..c53776b 100644
--- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1757,8 +1757,8 @@
     // for decoding register classes.
     // FIXME: This need to be extended to handle instructions with custom
     // decoder methods, and operands with (simple) MIOperandInfo's.
-    TypedInit *TI = dyn_cast<TypedInit>(NI->first);
-    RecordRecTy *Type = dyn_cast<RecordRecTy>(TI->getType());
+    TypedInit *TI = cast<TypedInit>(NI->first);
+    RecordRecTy *Type = cast<RecordRecTy>(TI->getType());
     Record *TypeRecord = Type->getRecord();
     bool isReg = false;
     if (TypeRecord->isSubClassOf("RegisterOperand"))