commit 8a60fff26016ea25b3af477d4945397c4242b42e
author Craig Topper <craig.topper@gmail.com> Thu Jan 16 06:14:45 2014 +0000
committer Craig Topper <craig.topper@gmail.com> Thu Jan 16 06:14:45 2014 +0000
tree 6eb00001b29632c47445d465689aa0d3934d89e6
parent 098000eb720d14a70b6f393eebfb4d256532ecca

Remove use of OpSize for populating VEX_PP field. A prefix encoding is now used instead. Simplify some other code. No functional changes intended.

llvm-svn: 199353

llvm/lib/Target/X86/X86CodeEmitter.cpp

diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index 5dba4ec..a699d67 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -834,7 +834,7 @@
   unsigned char VEX_W = 0;
 
   // XOP: Use XOP prefix byte 0x8f instead of VEX.
-  bool XOP = false;
+  bool XOP = (TSFlags >> X86II::VEXShift) & X86II::XOP;
 
   // VEX_5M (VEX m-mmmmm field):
   //
@@ -869,16 +869,9 @@
   //
   unsigned char VEX_PP = 0;
 
-  // Encode the operand size opcode prefix as needed.
-  if (TSFlags & X86II::OpSize)
-    VEX_PP = 0x01;
-
   if ((TSFlags >> X86II::VEXShift) & X86II::VEX_W)
     VEX_W = 1;
 
-  if ((TSFlags >> X86II::VEXShift) & X86II::XOP)
-    XOP = true;
-
   if ((TSFlags >> X86II::VEXShift) & X86II::VEX_L)
     VEX_L = 1;
 
@@ -946,6 +939,9 @@
   }
 
   switch (TSFlags & X86II::FormMask) {
+    default: llvm_unreachable("Unexpected form in emitVEXOpcodePrefix!");
+    case X86II::RawFrm:
+      break;
     case X86II::MRMDestMem: {
       // MRMDestMem instructions forms:
       //  MemAddr, src1(ModR/M)
@@ -1062,8 +1058,6 @@
       if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg()))
         VEX_B = 0x0;
       break;
-    default: // RawFrm
-      break;
   }
 
   // Emit segment override opcode prefix as needed.