Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
llvm-svn: 134590
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-clz.ll b/llvm/test/CodeGen/Thumb2/thumb2-clz.ll
index 74728bf..00a54a0 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-clz.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-clz.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s
+; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK: f1: