Factory methods for function passes now return type FunctionPass *.
llvm-svn: 7839
diff --git a/llvm/include/llvm/CodeGen/InstrScheduling.h b/llvm/include/llvm/CodeGen/InstrScheduling.h
index e01dfe7..1e9c0dc 100644
--- a/llvm/include/llvm/CodeGen/InstrScheduling.h
+++ b/llvm/include/llvm/CodeGen/InstrScheduling.h
@@ -8,7 +8,7 @@
#ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H
#define LLVM_CODEGEN_INSTR_SCHEDULING_H
-class Pass;
+class FunctionPass;
class TargetMachine;
//---------------------------------------------------------------------------
@@ -21,6 +21,6 @@
// are still in SSA form.
//---------------------------------------------------------------------------
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
#endif
diff --git a/llvm/include/llvm/CodeGen/InstrSelection.h b/llvm/include/llvm/CodeGen/InstrSelection.h
index 03999db..03e9af4 100644
--- a/llvm/include/llvm/CodeGen/InstrSelection.h
+++ b/llvm/include/llvm/CodeGen/InstrSelection.h
@@ -15,7 +15,7 @@
class InstructionNode;
class TargetMachine;
class MachineCodeForInstruction;
-class Pass;
+class FunctionPass;
//===--------------------- Required Functions ---------------------------------
// Target-dependent functions that MUST be implemented for each target.
@@ -43,7 +43,7 @@
// Return a pass that performs machine dependant instruction selection.
//---------------------------------------------------------------------------
-Pass *createInstructionSelectionPass(TargetMachine &Target);
+FunctionPass *createInstructionSelectionPass(TargetMachine &Target);
//************************ Exported Data Types *****************************/
diff --git a/llvm/include/llvm/CodeGen/PeepholeOpts.h b/llvm/include/llvm/CodeGen/PeepholeOpts.h
index fc3254d..2cbc778 100644
--- a/llvm/include/llvm/CodeGen/PeepholeOpts.h
+++ b/llvm/include/llvm/CodeGen/PeepholeOpts.h
@@ -8,8 +8,8 @@
#define LLVM_CODEGEN_PEEPHOLE_OPTS_H
class TargetMachine;
-class Pass;
+class FunctionPass;
-Pass *createPeepholeOptsPass(TargetMachine &Target);
+FunctionPass *createPeepholeOptsPass(TargetMachine &Target);
#endif
diff --git a/llvm/include/llvm/CodeGen/RegisterAllocation.h b/llvm/include/llvm/CodeGen/RegisterAllocation.h
index a0e5da8..572c325 100644
--- a/llvm/include/llvm/CodeGen/RegisterAllocation.h
+++ b/llvm/include/llvm/CodeGen/RegisterAllocation.h
@@ -7,13 +7,13 @@
#ifndef LLVM_CODEGEN_REGISTERALLOCATION_H
#define LLVM_CODEGEN_REGISTERALLOCATION_H
-class Pass;
+class FunctionPass;
class TargetMachine;
//----------------------------------------------------------------------------
// Entry point for register allocation for a module
//----------------------------------------------------------------------------
-Pass *getRegisterAllocator(TargetMachine &T);
+FunctionPass *getRegisterAllocator(TargetMachine &T);
#endif
diff --git a/llvm/include/llvm/Transforms/Scalar.h b/llvm/include/llvm/Transforms/Scalar.h
index 2ee3c46..58dcd42 100644
--- a/llvm/include/llvm/Transforms/Scalar.h
+++ b/llvm/include/llvm/Transforms/Scalar.h
@@ -72,7 +72,7 @@
// index of [0]).
// This pass decomposes all multi-dimensional references in a function.
-Pass *createDecomposeMultiDimRefsPass();
+FunctionPass *createDecomposeMultiDimRefsPass();
// This function decomposes a single instance of such a reference.
// Return value: true if the instruction was replaced; false otherwise.
@@ -238,7 +238,7 @@
// These two passes convert malloc and free instructions to and from %malloc &
// %free function calls.
//
-Pass *createLowerAllocationsPass();
+FunctionPass *createLowerAllocationsPass();
Pass *createRaiseAllocationsPass();
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
index e877822..a6222d6 100644
--- a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -1491,6 +1491,6 @@
}
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
return new InstructionSchedulingWithSSA(tgt);
}
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index fa81e9e..6d40e1d 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -74,7 +74,7 @@
};
}
-Pass *getRegisterAllocator(TargetMachine &T) {
+FunctionPass *getRegisterAllocator(TargetMachine &T) {
return new RegisterAllocator(T);
}
diff --git a/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp b/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
index de04cb6..b74c7df 100644
--- a/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
+++ b/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
@@ -167,6 +167,6 @@
}
}
-Pass* UltraSparc::getPrologEpilogInsertionPass() {
+FunctionPass *UltraSparc::getPrologEpilogInsertionPass() {
return new InsertPrologEpilogCode();
}
diff --git a/llvm/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp b/llvm/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp
index 65cf465..79b6aea 100644
--- a/llvm/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp
+++ b/llvm/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp
@@ -29,7 +29,7 @@
RegisterOpt<DecomposePass> X("lowerrefs", "Decompose multi-dimensional "
"structure/array references");
-Pass
+FunctionPass
*createDecomposeMultiDimRefsPass()
{
return new DecomposePass();
diff --git a/llvm/lib/Transforms/Scalar/LowerAllocations.cpp b/llvm/lib/Transforms/Scalar/LowerAllocations.cpp
index c5014b4..53584d9 100644
--- a/llvm/lib/Transforms/Scalar/LowerAllocations.cpp
+++ b/llvm/lib/Transforms/Scalar/LowerAllocations.cpp
@@ -47,7 +47,7 @@
}
// createLowerAllocationsPass - Interface to this file...
-Pass *createLowerAllocationsPass() {
+FunctionPass *createLowerAllocationsPass() {
return new LowerAllocations();
}