commit 8c18d8972cc8d2bd1e4a1b6d223f9d2a8d0dfd9d
author Anton Korobeynikov <asl@math.spbu.ru> Thu Jul 16 14:24:16 2009 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Thu Jul 16 14:24:16 2009 +0000
tree 18846fa8832cde6282e8ee1803653934147d3ee8
parent 3894c8b6c2a6b91eaadcb26a2431b18b7f0e36c3

Make FP zero to be legal FP immediate via LOAD ZERO

llvm-svn: 76034

llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 01ecf4f..4144f97 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -51,6 +51,11 @@
   if (!UseSoftFloat) {
     addRegisterClass(MVT::f32, SystemZ::FP32RegisterClass);
     addRegisterClass(MVT::f64, SystemZ::FP64RegisterClass);
+
+    addLegalFPImmediate(APFloat(+0.0));  // lzer
+    addLegalFPImmediate(APFloat(+0.0f)); // lzdr
+    addLegalFPImmediate(APFloat(-0.0));  // lzer + lner
+    addLegalFPImmediate(APFloat(-0.0f)); // lzdr + lndr
   }
 
   // Compute derived properties from the register classes