Change TII isCopyInstr way of returning arguments(NFC)
Make TII isCopyInstr() return MachineOperands through pointer to pointer
instead via reference.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D47364
llvm-svn: 334105
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 8c7de5f..4b589f5 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -935,8 +935,9 @@
Mov->addRegisterKilled(SrcReg, TRI);
}
-bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
// VMOVRRD is also a copy instruction but it requires
// special way of handling. It is more complex copy version
// and since that we are not considering it. For recognition
@@ -948,8 +949,8 @@
(MI.getOpcode() == ARM::VORRq &&
MI.getOperand(1).getReg() != MI.getOperand(2).getReg()))
return false;
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index d4db997..b54be15 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -201,8 +201,8 @@
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
index 593dafb..219f1ad 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -97,11 +97,12 @@
MIB.addReg(SrcReg, getKillRegState(KillSrc));
}
-bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
return false;
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.h b/llvm/lib/Target/Mips/Mips16InstrInfo.h
index 85e06f7..8190be6 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.h
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.h
@@ -53,8 +53,8 @@
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
index f31cc3d..04c4fdb 100644
--- a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
@@ -211,25 +211,26 @@
/// We check for the common case of 'or', as it's MIPS' preferred instruction
/// for GPRs but we have to check the operands to ensure that is the case.
/// Other move instructions for MIPS are directly identifiable.
-bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
bool isDSPControlWrite = false;
// Condition is made to match the creation of WRDSP/RDDSP copy instruction
// from copyPhysReg function.
if (isReadOrWritToDSPReg(MI, isDSPControlWrite)) {
- if (!MI.getOperand(1).isImm() || !(MI.getOperand(1).getImm() == (1<<4)))
+ if (!MI.getOperand(1).isImm() || MI.getOperand(1).getImm() != (1<<4))
return false;
else if (isDSPControlWrite) {
- Src = MI.getOperand(0);
- Dest = MI.getOperand(2);
+ Src = &MI.getOperand(0);
+ Dest = &MI.getOperand(2);
} else {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(2);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(2);
}
return true;
} else if (MI.isMoveReg() || isORCopyInst(MI)) {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
return false;
diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.h b/llvm/lib/Target/Mips/MipsSEInstrInfo.h
index cc97b59..fc55716 100644
--- a/llvm/lib/Target/Mips/MipsSEInstrInfo.h
+++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.h
@@ -47,8 +47,8 @@
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 1eda236..7f749b5 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -6852,11 +6852,12 @@
llvm_unreachable("Cannot emit physreg copy instruction");
}
-bool X86InstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool X86InstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
return false;
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 1cc3fad..8e50247 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -394,8 +394,8 @@
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, unsigned SrcReg,
bool isKill, int FrameIndex,