commit 8d71a757774daf1558086b6133ce4bb7c2cf1b40
author Evan Cheng <evan.cheng@apple.com> Mon Jun 27 21:26:13 2011 +0000
committer Evan Cheng <evan.cheng@apple.com> Mon Jun 27 21:26:13 2011 +0000
tree d5981c213abc0c3a7f056ee4f9e1dce955de13f9
parent d68b2d043865e1c106432f2ab9c1b99a5a2ba86e

More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.

llvm-svn: 133944

llvm/lib/CodeGen/TwoAddressInstructionPass.cpp

diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 3860e0b..f1c0bb1 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -943,7 +943,7 @@
         // Unfold the load.
         DEBUG(dbgs() << "2addr:   UNFOLDING: " << *mi);
         const TargetRegisterClass *RC =
-          UnfoldTID.OpInfo[LoadRegIndex].getRegClass(TRI);
+          TII->getRegClass(UnfoldTID, LoadRegIndex, TRI);
         unsigned Reg = MRI->createVirtualRegister(RC);
         SmallVector<MachineInstr *, 2> NewMIs;
         if (!TII->unfoldMemoryOperand(MF, mi, Reg,