Convert load/store over to being pattern matched
llvm-svn: 24871
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 27df47c..ba3fa0e 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -126,6 +126,7 @@
// FIXME: AltiVec supports a wide variety of packed types. For now, we're
// bringing up support with just v4f32.
addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass);
+ addRegisterClass(MVT::v4i32, PPC::VRRCRegisterClass);
}
setSetCCResultContents(ZeroOrOneSetCCResult);