Fix a typo in the dag combiner, so that this can work on i64 targets
llvm-svn: 23856
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 6c1d22c..b523bce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2607,9 +2607,8 @@
}
// Extract the sign bit and add it to the quotient
SDOperand T =
- DAG.getNode(ISD::SRL, MVT::i32, Q,
- DAG.getConstant(MVT::getSizeInBits(VT)-1,
- TLI.getShiftAmountTy()));
+ DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
+ TLI.getShiftAmountTy()));
WorkList.push_back(T.Val);
return DAG.getNode(ISD::ADD, VT, Q, T);
}