diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index acc00fd..f33946c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2383,6 +2383,31 @@
                          DAG.getConstant(Sum, N1C->getValueType(0)));
     }
   }
+
+  // fold sra (shl X, m), result_size - n
+  // -> (sign_extend (trunc (shl X, result_size - n - m))) for
+  // result_size - n != m. If truncate is free for the target sext(shl) is
+  // likely to result in better code.
+  if (N0.getOpcode() == ISD::SHL) {
+    // Get the two constanst of the shifts, CN0 = m, CN = n.
+    const ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
+    if (N01C && N1C) {
+      // Determine if the truncate type's bitsize would correspond to
+      // an integer type for this target.
+      unsigned VTValSize = MVT::getSizeInBits(VT);
+      MVT::ValueType TruncVT = MVT::getIntegerType(VTValSize - N1C->getValue());
+      unsigned ShiftAmt = N1C->getValue() - N01C->getValue();
+
+      // If the shift wouldn't be a noop, the truncated type is an actual type,
+      // and the truncate is free, then proceed with the transform.
+      if (ShiftAmt != 0 && TLI.isTruncateFree(VT, TruncVT)) {
+        SDOperand Amt = DAG.getConstant(ShiftAmt, TLI.getShiftAmountTy());
+        SDOperand Shift = DAG.getNode(ISD::SRL, VT, N0.getOperand(0), Amt);
+        SDOperand Trunc = DAG.getNode(ISD::TRUNCATE, TruncVT, Shift);
+        return DAG.getNode(ISD::SIGN_EXTEND, N->getValueType(0), Trunc);
+      }
+    }
+  }
   
   // Simplify, based on bits shifted out of the LHS. 
   if (N1C && SimplifyDemandedBits(SDOperand(N, 0)))